US2019250467A1PendingUtilityA1

Liquid crystal display and manufacturing method thereof

Assignee: SAMSUNG DISPLAY CO LTDPriority: Jul 24, 2013Filed: Apr 23, 2019Published: Aug 15, 2019
Est. expiryJul 24, 2033(~7 yrs left)· nominal 20-yr term from priority
G02F 1/133753G02F 1/133723G02F 1/133788G02F 1/133711G02F 1/1333G02F 2001/133761G02F 2001/133726G02F 2001/133773G02F 1/1337G02F 1/1343G02F 1/133773G02F 1/133726G02F 1/133761
68
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Claims

Abstract

A liquid crystal display includes a thin film transistor panel including a first alignment layer, an opposing panel including a second alignment layer, and opposite to the thin film transistor panel, and a liquid crystal layer between the thin film transistor panel and the opposing panel, and including liquid crystal molecules, wherein a difference between a pretilt angle provided by the first alignment layer and a pretilt angle provided by the second alignment layer is equal to or greater than about 0.8 degree.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a liquid crystal display, the method comprising:
 manufacturing a thin film transistor panel, and an opposing panel opposite to the thin film transistor panel;   applying an alignment material onto each of the thin film transistor panel and the opposing panel;   forming alignment layers by curing the alignment material of each of the thin film transistor panel and the opposing panel;   exposing only one of the thin film transistor panel and the opposing panel to ultraviolet rays;   forming a liquid crystal layer and bonding the thin film transistor panel and the opposing panel; and   exposing the bonded panels to an ultraviolet ray electric field.   
     
     
         2 . The method of  claim 1 , wherein:
 a difference between a pretilt angle provided by the alignment layer on the thin film transistor panel and a pretilt angle provided by the alignment layer on the opposing panel is equal to or greater than about 0.8 degree.   
     
     
         3 . The method of  claim 2 , wherein:
 the applying the alignment material includes applying a same alignment material including reactive mesogen onto each of the thin film transistor panel and the opposing panel.   
     
     
         4 . The method of  claim 3 , wherein:
 the opposing panel is exposed to the ultraviolet rays.   
     
     
         5 . The method of  claim 3 , wherein:
 the alignment layers include an alignment adjusting layer and a pretilt adjusting layer.   
     
     
         6 . The method of  claim 3 , wherein:
 the exposing only one of the thin film transistor panel and the opposing panel to ultraviolet rays includes exposing only one of the thin film transistor panel and the opposing panel to ultraviolet rays with an intensity of approximately 5 joules per square centimeter to approximately 30 joules per square centimeter for about 20 minutes to about 1 hour.   
     
     
         7 . The method of  claim 3 , further comprising:
 baking the thin film transistor panel and the opposing panel at different temperatures, respectively, before the forming the liquid crystal layer and the bonding of the thin film transistor panel and the opposing panel.   
     
     
         8 . A method of manufacturing a liquid crystal display, the method comprising:
 manufacturing a thin film transistor panel, and an opposing panel opposite to the thin film transistor panel;   applying an alignment material onto each of the thin film transistor panel and the opposing panel;   forming alignment layers by curing the alignment material of each of the thin film transistor panel and the opposing panel, in which the thin film transistor panel and the opposing panel are baked at different temperatures, respectively;   forming a liquid crystal layer and bonding the thin film transistor panel and the opposing panel; and   exposing the bonded panels to an ultraviolet ray electric field.   
     
     
         9 . The method of  claim 8 , wherein:
 a difference between a pretilt angle provided by the alignment layer on the thin film transistor panel and a pretilt angle provided by the alignment layer on the opposing panel is equal to or greater than about 0.8 degree.   
     
     
         10 . The method of  claim 9 , wherein:
 the applying the alignment material includes applying a same alignment material including reactive mesogen onto each of the thin film transistor panel and the opposing panel.   
     
     
         11 . The method of  claim 10 , wherein:
 the forming the alignment layers includes differentiating pre-curing temperatures for the alignment materials of the thin film transistor panel and the opposing panel, respectively.   
     
     
         12 . The method of  claim 10 , wherein:
 the forming the alignment layers includes differentiating main-curing temperatures for the alignment materials of the thin film transistor panel and the opposing panel, respectively.   
     
     
         13 . The method of  claim 10 , wherein:
 the forming the alignment layers includes differentiating pre-curing temperatures and main-curing temperatures for the alignment materials of the thin film transistor panel and the opposing panel, respectively.   
     
     
         14 . The method of  claim 10 , wherein:
 the alignment material applied onto the opposing panel is subjected to pre-curing at a lower temperature than that of the alignment material applied onto the thin film transistor panel.   
     
     
         15 . The method of  claim 10 , wherein:
 the alignment material applied onto the opposing panel is subjected to main-curing at a higher temperature than that of the alignment material applied onto the thin film transistor panel.   
     
     
         16 . The method of  claim 8 , wherein:
 the alignment layers include an alignment adjusting layer and a pretilt adjusting layer.   
     
     
         17 . The method of  claim 8 , further comprising:
 exposing only one panel among the thin film transistor and opposing panels to ultraviolet rays before the forming the liquid crystal layer and the bonding the thin film transistor panel and an opposing panel.

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