US2019244922A1PendingUtilityA1
Nickel-tin microbump structures and method of making same
Est. expirySep 15, 2036(~10.1 yrs left)· nominal 20-yr term from priority
H10W 90/734H10W 90/725H10W 90/724H10W 74/15H10W 72/07331H10W 72/01235H10W 72/252H10W 72/222H10W 70/695H10W 72/30H10W 72/012H10W 72/073H10W 72/072H10W 72/07236H10W 72/354H10W 72/20H01L 2224/13155H01L 24/16H01L 2224/13111H01L 24/13H01L 2224/16225H01L 24/32H01L 2224/32225H01L 2224/11462H01L 24/11H01L 2224/83951H01L 2224/73204H01L 2224/16157H01L 2224/13082H01L 2924/15311H10W 72/013H10W 90/701H10W 20/40
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Claims
Abstract
Techniques and mechanisms for providing effective connectivity with surface level microbumps on an integrated circuit package substrate. In an embodiment, different metals are variously electroplated to form a microbump which extends through a surface-level dielectric of a substrate to a seed layer including copper. The microbump includes nickel and tin, wherein the nickel aids in mitigating an absorption of seed layer copper. In another embodiment, the microbump has a mass fraction of tin, or a mass fraction of nickel, that is different in various regions along a height of the microbump.
Claims
exact text as granted — not AI-modified1 . A method for forming microbumps on a substrate, the method comprising:
patterning a dielectric layer, wherein a copper contact is exposed by an opening formed in the dielectric layer; performing a deposition of a seed layer on the copper contact, the seed layer comprising copper; electroplating nickel of a first microbump directly on the seed layer; and electroplating tin of the first microbump directly on the nickel.
2 . The method of claim 1 , wherein performing the deposition of the seed layer includes performing an electroless plating of the seed layer directly on the copper contact.
3 . The method of claim 1 , wherein a bottom 10% of a volume of the first microbump has a first tin mass fraction, wherein a top 10% of a volume of the first microbump has a second tin mass fraction and wherein the second tin mass fraction differs from the first tin mass fraction by at least 5% of the first tin mass fraction.
4 . The method of claim 3 , wherein the second tin mass fraction differs from the first tin mass fraction by at least 10% of the first tin mass fraction.
5 . The method of claim 1 , wherein a total volume of tin of the first microbump is equal to at least 75% of a total volume of nickel of the first microbump.
6 . The method of claim 1 , wherein a total tin mass fraction of the first microbump is in a range of 50% to 90%.
7 . The method of claim 1 , further comprising forming a surface finish on the copper contact, wherein the seed layer is deposited on the surface finish.
8 . A method of fabricating an integrated circuit (IC) package substrate, the method comprising:
forming a dielectric layer above a sub-surface-level metal layer, the sub-surface-level metal layer including copper contacts; forming via holes in the dielectric layer, the via holes exposing the copper contacts; forming a seed layer in the via holes and above the copper contacts, the seed layer including copper; and forming microbumps on the seed layer, the microbumps including tin and nickel, wherein a bottom ten percent of a volume of each of the microbumps has a first tin mass fraction, wherein a top ten percent of the volume of each of the microbumps has a second tin mass, and wherein the second tin mass fraction differs from the first tin mass fraction by at least five percent of the first tin mass fraction.
9 . The method of claim 8 , further comprising:
prior to forming the seed layer, forming a surface finish on the copper contacts, wherein the seed layer is formed on the surface finish.
10 . The method of claim 8 , wherein the seed layer is formed directly on the copper contacts.
11 . The method of claim 8 , wherein nickel of each of the microbumps is directly on the seed layer.
12 . The method of claim 8 , wherein the second tin mass fraction differs from the first tin mass fraction by at least ten percent of the first tin mass fraction.
13 . The method of claim 8 , wherein a total tin mass fraction of each of the microbumps is in a range of 50% to 90%.
14 . A method of fabricating an integrated circuit (IC) package substrate, the method comprising:
forming a dielectric layer above a sub-surface-level metal layer, the sub-surface-level metal layer including copper contacts; forming via holes in the dielectric layer, the via holes exposing the copper contacts; forming a seed layer in the via holes and above the copper contacts, the seed layer including copper; and forming microbumps on the seed layer, the microbumps including tin and nickel, wherein a total volume of tin of each of the microbumps is equal to at least 75% of a total volume of nickel of each of the microbumps.
15 . The method of claim 14 , further comprising:
prior to forming the seed layer, forming a surface finish on the copper contacts, wherein the seed layer is formed on the surface finish.
16 . The method of claim 14 , wherein the seed layer is formed directly on the copper contacts.
17 . The method of claim 14 , wherein nickel of each of the microbumps is directly on the seed layer.
18 . The method of claim 14 , wherein a total tin mass fraction of each of the microbumps is in a range of 50% to 90%.
19 . The method of claim 14 , wherein a bottom ten percent of a volume of each of the microbumps has a first tin mass fraction, wherein a top ten percent of the volume of each of the microbumps has a second tin mass, and wherein the second tin mass fraction differs from the first tin mass fraction by at least five percent of the first tin mass fraction.
20 . The method of claim 19 , wherein the second tin mass fraction differs from the first tin mass fraction by at least ten percent of the first tin mass fraction.Join the waitlist — get patent alerts
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