Two-level system main memory

Abstract

The far memory is presented as “main memory” to the host OS while the near memory is a cache for the far memory that is transparent to the OS, thus appearing to the OS the same as prior art main memory solutions. The management of the two-level memory may be done by a combination of logic and modules executed via the host CPU. Near memory may be coupled to the host system CPU via high bandwidth, low latency means for efficient processing. Far memory may be coupled to the CPU via low bandwidth, high latency means.

1 .- 18 . (canceled) 
     
     
         19 .- 28 . (canceled) 
     
     
         29 . A computing system, comprising:
 a processor;   a network interface;   a memory coupled to the processor, the memory comprising a volatile component and a non volatile component, the non volatile component of the memory to keep persisted pages of data so that the persisted pages of data are accessible to the processor without having to access a discrete mass storage drive.   
     
     
         30 . The computing system of  claim 29  wherein the computing system further comprises a disk level memory. 
     
     
         31 . The computing system of  claim 29  wherein the non volatile memory component is a component of main memory. 
     
     
         32 . The computing system of  claim 29  wherein the volatile component of the memory comprises dynamic random access memory (DRAM). 
     
     
         33 . The computing system of  claim 29  wherein the pages of data are migratable to the non volatile component of the memory. 
     
     
         34 . The computing system of  claim 29  wherein the memory is able to store data in a compressed format. 
     
     
         35 . A method, comprising:
 in a computing system comprising a processor, a network interface and a memory coupled to the processor, wherein the memory comprises a volatile component and a non volatile component:   keeping persisted pages in the non volatile component of the memory; and,   accessing the persisted pages in the non volatile component of the memory by the processor without accessing a discrete mass storage drive.   
     
     
         36 . The method of  claim 35  wherein the computing system further comprises a disk level memory. 
     
     
         37 . The method of  claim 35  wherein the non volatile memory component is a component of main memory. 
     
     
         38 . The method of  claim 35  wherein the volatile component of the memory comprises dynamic random access memory (DRAM). 
     
     
         39 . The method of  claim 35  further comprising migrating the pages to the non volatile component of the memory. 
     
     
         40 . The method of  claim 35  further comprising the memory storing the data in a compressed format.