US2019237493A1PendingUtilityA1

Thin film transistor substrate and display using the same

Assignee: LG DISPLAY CO LTDPriority: Feb 24, 2014Filed: Apr 5, 2019Published: Aug 1, 2019
Est. expiryFeb 24, 2034(~7.6 yrs left)· nominal 20-yr term from priority
G02F 1/13624G02F 1/1368H01L 29/78675H01L 27/1251H01L 21/8221H01L 27/1214H01L 29/7869H01L 27/3244H01L 29/04H01L 27/1248H01L 27/1225H10D 86/60H10K 59/12H10D 86/471H10D 30/6755H10D 30/6757H10D 30/6733H10D 88/01H10D 86/40H10D 84/038H10D 86/451H10D 86/423H10D 62/40H10D 30/6745H10D 30/6731H10K 59/1213G02F 1/13685
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Claims

Abstract

The present disclosure relates to a thin film transistor substrate having two different types of thin film transistors on the same substrate. A thin film transistor substrate includes a substrate; a first thin film transistor disposed on the substrate, the first thin film transistor including a poly crystalline semiconductor layer, a first gate electrode over the poly crystalline semiconductor layer, a first source electrode, and a first drain electrode; a second thin film transistor disposed on the substrate, the second thin film transistor including a second gate electrode, an oxide semiconductor layer over the second gate electrode, a second source electrode, and a second drain electrode; and an intermediate insulating layer including a nitride layer and an oxide layer on the nitride layer, the intermediate insulating layer disposed over the first gate electrode and the second gate electrode and under the oxide semiconductor layer.

Claims

exact text as granted — not AI-modified
1 - 10 . (canceled) 
     
     
         11 . A thin film transistor substrate, comprising:
 a substrate;   a first thin film transistor on the substrate, the first thin film transistor including:
 a polycrystalline semiconductor layer; 
 a first gate electrode over the polycrystalline semiconductor layer; 
 a first source electrode; and 
 a first drain electrode; 
   a second thin film transistor on the substrate, the second thin film transistor including:
 a second gate electrode; 
 an oxide semiconductor layer over the second gate electrode; 
 a second source electrode; and 
 a second drain electrode; 
   a gate insulating layer covering the polycrystalline semiconductor layer and disposed below the first gate electrode and the second gate electrode; and   an intermediate insulating layer including a first oxide layer, a nitride layer on the first oxide layer, and a second oxide layer on the nitride layer, the intermediate insulating layer being disposed over the gate insulating layer, the first gate electrode, and the second gate electrode,   wherein the first oxide layer directly contacts the gate insulating layer and covers the first and second gate electrodes,   wherein the second oxide layer has a thickness larger than that of the nitride layer, and   wherein the oxide semiconductor layer directly contacts the second oxide layer.   
     
     
         12 . The thin film transistor substrate according to  claim 11 , wherein:
 a portion of the first source electrode is on the second oxide layer, and is connected to a first portion of the polycrystalline semiconductor layer by a source contact hole through the intermediate insulating layer and the gate insulating layer; and   a portion of the first drain electrode is on the second oxide layer, and is connected to a second portion of the polycrystalline semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer.   
     
     
         13 . The thin film transistor substrate according to  claim 11 , wherein:
 the second source electrode contacts one portion of the oxide semiconductor layer; and   the second drain electrode contacts another portion of the oxide semiconductor layer.   
     
     
         14 . The thin film transistor substrate according to  claim 11 , wherein:
 a portion of the second source electrode is directly on the second oxide layer; and   a portion of the second drain electrode is directly on the second oxide layer.   
     
     
         15 . The thin film transistor substrate according to  claim 11 , wherein the intermediate insulating layer has a thickness of 2,500 Ř6,000 Å. 
     
     
         16 . The thin film transistor substrate according to  claim 15 , wherein:
 the first oxide layer has a thickness of 500 Ř1,000 Å;   the nitride layer has a thickness of 1,000 Ř2,000 Å; and   the second oxide layer has a thickness of 1,000 Ř3,000 Å.   
     
     
         17 . The thin film transistor substrate according to  claim 11 , further comprising a passivation layer on the second oxide layer to cover the first and second source electrodes, the first and second drain electrodes, and the oxide semiconductor layer. 
     
     
         18 . A thin film transistor substrate, comprising:
 a substrate;   a first semiconductor layer on the substrate and including a polycrystalline semiconductor material;   a gate insulating layer covering the first semiconductor layer;   a first gate electrode on the gate insulating layer and overlapping the first semiconductor layer;   a second gate electrode on the gate insulating layer;   an intermediate insulating layer including a first oxide layer, a nitride layer on the first oxide layer, and a second oxide layer on the nitride layer;   a second semiconductor layer on the second oxide layer, including an oxide semiconductor material, and overlapping the second gate electrode;   a first source electrode and a first drain electrode on the second oxide layer; and   a second source electrode and a second drain electrode on the second semiconductor layer,   wherein the first oxide layer directly contacts the gate insulating layer and covers the first and second gate electrodes,   wherein the second oxide layer has a thickness larger than that of the nitride layer, and   wherein the oxide semiconductor layer directly contacts the second oxide layer.   
     
     
         19 . The thin film transistor substrate according to  claim 18 , wherein:
 the first source electrode is connected to a first portion of the first semiconductor layer through a source contact hole penetrating the intermediate insulating layer and the gate insulating layer; and   the first drain electrode is connected to a second portion of the first semiconductor layer through a drain contact hole penetrating the intermediate insulating layer and the gate insulating layer.   
     
     
         20 . The thin film transistor substrate according to  claim 18 , wherein:
 the second source electrode contacts a first portion of the second semiconductor layer; and   the second drain electrode contacts a second portion of the second semiconductor layer.   
     
     
         21 . The thin film transistor substrate according to  claim 18 , wherein:
 a portion of the second source electrode is directly on the second oxide layer; and   a portion of the second drain electrode is directly on the second oxide layer.   
     
     
         22 . The thin film transistor substrate according to  claim 18 , wherein the intermediate insulating layer has a thickness of 2,500 Ř6,000 Å. 
     
     
         23 . The thin film transistor substrate according to  claim 22 , wherein:
 the first oxide layer has a thickness of 500 Ř1,000 Å;   the nitride layer has a thickness of 1,000 Ř2,000 Å; and   the second oxide layer has a thickness of 1,000 Ř3,000 Å.   
     
     
         24 . The thin film transistor substrate according to  claim 18 , further comprising a passivation layer on the second oxide layer to cover the first and second source electrodes, the first and second drain electrodes, and the oxide semiconductor layer. 
     
     
         25 . A display device comprising the thin film transistor substrate of  claim 11 , wherein the display device is one of: a liquid crystal display device (LCD), a plasma display panel (PDP), an organic light-emitting display device (OLED), and a electrophoresis display device (ED).

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