US2019229622A1PendingUtilityA1

Multiphase interleaved pulse frequency modulation for a dc-dc converter

Assignee: APPLE INCPriority: Dec 21, 2017Filed: Apr 2, 2019Published: Jul 25, 2019
Est. expiryDec 21, 2037(~11.4 yrs left)· nominal 20-yr term from priority
H02M 3/1588H02M 3/1584H02M 1/15H02M 1/08H02M 2001/0025H02M 3/1586H02M 1/0025Y02B70/10
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Claims

Abstract

An apparatus includes a plurality of pulse control circuits and a control circuit. A given pulse control circuit of the plurality of pulse control circuits may source a current pulse to the output power signal based on a comparison of a particular feedback signal of a plurality of feedback signals and a target voltage signal. The control circuit may offset a voltage level of each feedback signal of a first subset of the plurality of feedback signals. The first subset may exclude a first feedback signal. In response to a determination that a period of time has ended, the control circuit may offset a voltage level of each feedback signal of a second subset of the plurality of feedback signals. The second subset may include the first feedback signal and exclude a second feedback signal.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus, comprising:
 three or more pulse control circuits including respective feedback input nodes, and configured to source a current pulse on an output node based on a voltage level of the respective feedback input node; and   a control circuit configured to apply a different offset voltage to each of the respective feedback input nodes of the three or more pulse control circuits.   
     
     
         2 . The apparatus of  claim 1 , wherein a first offset voltage is zero volts, a second offset voltage is a full offset voltage, and a third offset voltage is a partial offset voltage, and wherein the partial offset voltage is greater than zero volts and less than the full offset voltage. 
     
     
         3 . The apparatus of  claim 2 , wherein the control circuit is further configured to, in response to a determination that a period of time has ended:
 change a first feedback input node of a first pulse control circuit of the three or more pulse control circuits from the first offset voltage to the second offset voltage;   change a second feedback input node of a second pulse control circuit of the three or more pulse control circuits from the second offset voltage to the third offset voltage; and   change a third feedback input node of a third pulse control circuit of the three or more pulse control circuits from the third offset voltage to the first offset voltage.   
     
     
         4 . The apparatus of  claim 3 , further comprising a fourth pulse control circuit including a fourth feedback input node, wherein the control circuit is further configured to, in response to the determination that the period of time has ended, maintain the second offset voltage on the fourth feedback input node. 
     
     
         5 . The apparatus of  claim 1 , further comprising three or more offset generators, wherein a respective offset generator of the three or more offset generators is coupled between the feedback input node and the output node of a corresponding pulse control circuit, and wherein the respective offset generator is configured to apply a particular offset voltage level to the feedback input node of the corresponding pulse control circuit. 
     
     
         6 . The apparatus of  claim 5 , wherein the control circuit is further configured to send a respective enable signal to each of the plurality of offset generators, wherein the respective enable signal includes an indicator of an amount of offset voltage to apply to the respective feedback input node. 
     
     
         7 . The apparatus of  claim 1 , wherein to source the current pulse on the output node based on the voltage level of the respective feedback input node, the three or more pulse control circuits are configured to:
 compare the voltage level of the respective feedback input node to a target voltage level; and   source the current pulse in response to a determination that the voltage level of the respective feedback input node is less than the target voltage level.   
     
     
         8 . A method, comprising:
 at a first point in time, applying, by a control circuit, a different offset voltage to each of three feedback signals, each of the three feedback signals going to a respective one of three pulse control circuits, wherein a lowest offset voltage of the different offset voltages is applied to a first feedback signal of the three feedback signals; and   while the lowest offset voltage is applied to the first feedback signal, sourcing, by a first pulse control circuit that receives the first feedback signal, a current pulse to a load circuit based on a voltage level of the first feedback signal.   
     
     
         9 . The method of  claim 8 , wherein sourcing the current pulse to the load circuit comprises sourcing the current pulse in response to a determination that a voltage level of the first feedback signal is less than a target voltage level. 
     
     
         10 . The method of  claim 9 , further comprising, while a highest offset voltage of the different offset voltages is applied to a second feedback signal of the three feedback signals, sourcing, by a second pulse control circuit that receives the second feedback signal, zero current in response to a determination that a voltage level of the second feedback signal is greater than the target voltage level. 
     
     
         11 . The method of  claim 10 , further comprising, while a partial offset voltage is applied to a third feedback signal of the three feedback signals, sourcing, by a third pulse control circuit that receives the third feedback signal, zero current in response to a determination that a voltage level of the third feedback signal is greater than the target voltage level, wherein the partial offset voltage is greater than the lowest offset voltage and less than the highest offset voltage. 
     
     
         12 . The method of  claim 11 , further comprising, at a subsequent point in time while the partial offset voltage is applied to the third feedback signal, sourcing, by the third pulse control circuit, a current pulse to the load circuit in response to a determination that a voltage level of the third feedback signal has fallen below the target voltage level. 
     
     
         13 . The method of  claim 8 , further comprising, in response to determining that a period of time has elapsed since the first point in time:
 changing an offset voltage applied to the first feedback signal from the lowest offset voltage to a highest offset voltage of the different offset voltages;   changing an offset voltage applied to a second feedback signal of the three feedback signals from the highest voltage level to a partial offset voltage; and   changing an offset voltage applied to a third feedback signal of the three feedback signals from the partial offset voltage to a lowest offset voltage of the different offset voltages.   
     
     
         14 . The method of  claim 13 , further comprising tracking, by the control circuit, periods of time between changes in offset voltages to the first, second, and third feedback signals. 
     
     
         15 . A system comprising:
 a load circuit; and   a voltage regulator circuit coupled to the load circuit, and including three pulse control circuits, wherein each pulse control circuit includes a respective feedback input node, and wherein the voltage regulator circuit is configured to:   track a first period of time;   in response to an end of the first period of time:
 apply a different offset voltage on each of the respective feedback input nodes of the three pulse control circuits; and 
 track a second period of time. 
   
     
     
         16 . The system of  claim 15 , wherein to apply the different offset voltage on each of the respective feedback input nodes, the voltage regulator circuit is further configured to:
 apply zero volts to a first feedback input node of a first pulse control circuit of the three pulse control circuits;   apply a full offset voltage to a second feedback input node of a second pulse control circuit of the three pulse control circuits; and   apply a partial offset voltage to a third feedback input node of a third pulse control circuit of the three pulse control circuits, wherein the partial offset voltage is greater than zero volts and less than the full offset voltage.   
     
     
         17 . The system of  claim 16 , wherein the first pulse control circuit is configured to, during the second period of time, source a current pulse to the load circuit in response to a determination that a voltage level on the first feedback input node is less than a target voltage level. 
     
     
         18 . The system of  claim 17 , wherein the second pulse control circuit is configured to, during the second period of time, source a current pulse to the load circuit in response to a determination that a voltage level of the second feedback input node, including the full offset voltage, is less than the target voltage level. 
     
     
         19 . The system of  claim 17 , wherein the third pulse control circuit is configured to, during the second period of time, source a current pulse to the load circuit in response to a determination that a voltage level of the third feedback input node, including the partial offset voltage, is less than the target voltage level. 
     
     
         20 . The system of  claim 16 , wherein the voltage regulator circuit is further configured to, in response to an end of the second period of time:
 apply zero volts on the third feedback input node of the third pulse control circuit;   apply the full offset voltage on the first feedback input node of the first pulse control circuit;   apply the partial offset voltage on the second feedback input node of the second pulse control circuit; and   track a third period of time.

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