Programmable trim filter for successive approximation register analog to digital converter comparator

Abstract

The disclosure includes a successive approximation register (SAR) analog to digital converter (ADC). The SAR ADC includes a sampling network to store a sample of an analog signal. The SAR ADC also includes a comparator to successively compare the sample to reference values to determine a digital value corresponding to the sample of the analog signal. The comparator employs a plurality of comparator preamplifiers. The comparator also includes a programmable trim filter. The programmable trim filter is selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with a preamplifier settling time subceeding a preamplifier settling threshold.

We claim: 
     
         1 . A converter for a successive approximation register analog to digital conversion, comprising:
 a capacitive network configured to store a sample of an analog signal;   a plurality of comparator preamplifiers;   a process monitor configured to determine a frequency response of the plurality of comparator preamplifiers; and   a programmable trim filter selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with preamplifier settling time less than a preamplifier settling threshold based on the frequency response of the plurality of comparator preamplifiers.   
     
     
         2 . The converter of  claim 1  wherein the process monitor includes a ring oscillator. 
     
     
         3 . The converter of  claim 2  wherein the processor monitor is further configured to determine the frequency response of the plurality of comparator preamplifiers by determining the frequency response of the ring oscillator. 
     
     
         4 . The converter of  claim 3  wherein the ring oscillator includes a plurality of process monitor preamplifiers having a same configuration as the plurality of comparator preamplifiers. 
     
     
         5 . The converter of  claim 4  wherein the ring oscillator includes a test filter to vary capacitance applied to the process monitor preamplifiers. 
     
     
         6 . The converter of  claim 2  wherein the process monitor further includes a processor to measure the frequency response associated with the comparator preamplifiers based on the process monitor output data, and selectively set the programmable trim filter based on the measured frequency response. 
     
     
         7 . The converter of  claim 2  wherein the process monitor further includes a frequency division circuit to reduce a frequency of a process monitor output to support measurement of the frequency response of the ring oscillator. 
     
     
         8 . A microchip for a peripheral audio device having a successive approximation register analog to digital converter, the microchip including:
 a capacitive network configured to store a sample of an analog signal;   a plurality of comparator preamplifiers;   a process monitor configured to determine a speed or frequency response of the microchip; and   a programmable trim filter selectively set to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with preamplifier settling time less than a preamplifier settling threshold based on the speed or frequency response of the microchip.   
     
     
         9 . The microchip of  claim 8  wherein the process monitor includes a ring oscillator. 
     
     
         10 . The microchip of  claim 9  wherein the processor monitor is further configured to determine the speed or frequency response of the microchip by determining the frequency response of the ring oscillator. 
     
     
         11 . The microchip of  claim 10  wherein the ring oscillator includes a plurality of process monitor preamplifiers having a same configuration as the plurality of comparator preamplifiers. 
     
     
         12 . The microchip of  claim 11  wherein the ring oscillator includes a test filter to vary capacitance applied to the process monitor preamplifiers. 
     
     
         13 . The microchip of  claim 9  wherein the process monitor includes a processor to measure the frequency response associated with the comparator preamplifiers based on the process monitor output data, and selectively set the programmable trim filter based on the measured frequency response. 
     
     
         14 . The microchip of  claim 9  wherein the process monitor includes a frequency division circuit to reduce a frequency of a process monitor output to support measurement of the frequency response of the ring oscillator. 
     
     
         15 . A method for optimizing a successive approximation register analog to digital converter for a particular microchip, comprising:
 determining a frequency response of the particular microchip on startup by testing a frequency response of a ring oscillator, the ring oscillator including a plurality of process monitor preamplifiers sharing a common configuration with comparator preamplifiers in a comparator employed by a successive approximation register analog to digital converter;   determining a programmable trim filter setting to adjust a bandwidth of the comparator preamplifiers to a bandwidth value corresponding with preamplifier settling time subceeding a preamplifier settling threshold based on the frequency response of the particular microchip; and   adjusting the bandwidth of the comparator preamplifiers based on the determined programmable trim filter setting.   
     
     
         16 . The method of  claim 15  further comprising storing the programmable trim filter setting in a firmware employed during analog to digital conversion. 
     
     
         17 . The method of  claim 15  wherein the programmable trim filter setting is employed to control a programmable trim filter in the comparator during conversion of a sample of an analog signal into a digital value, the programmable trim filter including a network of capacitors coupled to the comparator preamplifiers and operated via controllable transistors. 
     
     
         18 . The method of  claim 17  wherein the comparator includes a latch to store a comparison of the sample and a reference value, the programmable trim filter coupled between the comparator preamplifiers and the latch. 
     
     
         19 . The method of  claim 15  wherein measuring the frequency response of the particular microchip includes receiving output from a process monitor including the ring oscillator, the output received via a frequency division circuit to reduce a frequency of the process monitor output. 
     
     
         20 . The method of  claim 15  wherein determining the frequency response of the particular microchip on startup by testing the frequency response of a ring oscillator includes varying capacitance applied to the process monitor preamplifiers by a test filter.