Shield wrap for a heterostructure field effect transistor

Abstract

Devices are disclosed for providing heterojunction field effect transistor (HFETs) having improved performance and/or reduced noise generation. A gate electrode is over a portion of the active region and is configured to modulate a conduction channel in the active region of an HFET. The active region is in a semiconductor film between a source electrode and a drain electrode. A first passivation film is over the active region. An encapsulation film is over the first passivation film. A first metal pattern on the encapsulation film includes a shield wrap over the majority of the active region and is electrically connected to the source electrode

1 - 27 . (canceled) 
     
     
         28 . A high-voltage field effect transistor (HFET), comprising:
 a first passivation film formed over an AlGaN film as a first portion of a gate dielectric;   a second passivation film formed over the first passivation film as a second portion of the gate dielectric;   a gate electrode formed on top of the second passivation film, the second passivation film and the first passivation film disposed between the AlGaN film and the gate electrode;   a source electrode and a drain electrode formed on the AlGaN film;   a third passivation film formed over the source electrode, the drain electrode, and the gate electrode;   a first gate field plate formed on top of the third passivation film;   a fourth passivation film formed over the first gate field plate;   a first metal pattern including a second gate field plate formed over the fourth passivation;   a first source via electrically connecting the first metal pattern to the source electrode;   a first drain via electrically connecting the first metal pattern to the drain electrode;   an encapsulation film formed over the first metal pattern; and   a second metal pattern formed over the encapsulation film and comprising: a shield wrap disposed over the encapsulation film, a second source via electrically connecting the shield wrap to the source electrode, and a second drain via electrically connecting a drain connection to the drain electrode.   
     
     
         29 . The HFET of  claim 28 , wherein the AlGaN film is disposed over a GaN film buffer layer. 
     
     
         30 . The HFET of  claim 28 , wherein the second gate field plate extends over the fourth passivation film from the first source via. 
     
     
         31 . The HFET of  claim 28 , wherein the first passivation film comprises one of Al2O3, zirconium dioxide (ZrO2), aluminum nitride (AlN), of hafnium oxide (HfO2). 
     
     
         32 . The HFET of  claim 28 , wherein a metal stack for the source electrode, the drain electrode, and the gate electrode comprises at least one of TiW, TiN, or TiAu. 
     
     
         33 . The HFET of  claim 28 , wherein a metal stack for the source electrode, the drain electrode, and the gate electrode comprises at least one of TiAlMoAu, TiAlNiAu, or TiAlPtAu. 
     
     
         34 . The HFET of  claim 28 , wherein the third passivation film is a composite film made of layers of multiple films. 
     
     
         35 . The HFET of  claim 28 , wherein the encapsulation film comprises one of organic dielectrics, polyimide, or benzocyclobutene based dielectrics. 
     
     
         36 . The HFET of  claim 28 , wherein the encapsulation film is a composite film made of layers of multiple films. 
     
     
         37 . The HFET of  claim 28 , comprising:
 a gap defined in the second metal pattern between the shield wrap and the drain connection.   
     
     
         38 . The HFET of  claim 37 , wherein the gap is filled with SiN.