Buried Trench Isolation in Integrated Circuits

Abstract

A system and method for providing electrical isolation between closely spaced devices in a high density integrated circuit (IC) are disclosed herein. An integrated circuit (IC) comprising a substrate, a first device, a second device, and a buried trench in the substrate and a method of fabricating the same are also discussed. The buried trench is positioned between first and second devices and may be filled with dielectric material. Alternatively, the buried trench contains air. A method of using Hydrogen annealing to create the buried trench is disclosed.

What is claimed is: 
     
         1 - 4 . (canceled) 
     
     
         5 . An integrated circuit (IC), comprising:
 a substrate;   a first device and a second device formed over a surface of the substrate;   an isolator arranged to isolate the first device and the second device from one another, wherein the isolator comprises at least one dielectric layer completely buried in the substrate, and wherein the isolator is positioned between the first and second devices; and   a seed material disposed at least on top of the at least one dielectric layer and the surface of the substrate, wherein the seed material is configured to smooth a reshaping of the substrate over the isolator.   
     
     
         6 . The IC of  claim 5 , wherein the seed material comprises silicon or germanium and wherein the seed material is configured to smooth a reshaping of the substrate over the isolator. 
     
     
         7 . The IC of  claim 5 , wherein a vertical cross-section of the at least one dielectric layer has a rectangular perimeter. 
     
     
         11 . The IC of  claim 5 , wherein a vertical cross-section of the at least one dielectric layer has a height greater than a width. 
     
     
         12 . The IC of  claim 5 , wherein the isolator comprises at least two dielectric layers buried in the substrate. 
     
     
         13 . The IC of  claim 12 , wherein the at least two dielectric layers are aligned along a line that is substantially perpendicular to the surface of the substrate. 
     
     
         14 . A semiconductor apparatus, comprising:
 first and second devices formed over a substrate; and   an isolation region disposed at least partly within the substrate and between the first and second devices, wherein the isolation region includes a dielectric layer and a seed layer disposed on top of the dielectric layer and a top surface of the substrate, and wherein the seed layer includes at least one of silicon or germanium.   
     
     
         15 . The semiconductor apparatus of  claim 14 , wherein the isolation region further includes a trench, and wherein the seed layer is disposed over the top surface of the substrate that is adjacent to an opening of the trench. 
     
     
         16 . The semiconductor apparatus of  claim 15 , wherein the seed layer is further disposed over a portion of side surfaces of the trench. 
     
     
         17 . The semiconductor apparatus of  claim 15 , wherein the seed layer is configured to smooth a reshaping of the substrate over the isolation region. 
     
     
         18 . An isolation structure, comprising:
 a trench formed within a substrate;   a dielectric layer filling at least a bottom portion of the trench; and   a seed layer disposed over a top surface of the dielectric layer and a top surface of the substrate, wherein the seed layer is configured to smooth a reshaping of the substrate over the dielectric layer.   
     
     
         19 . The isolation structure of  claim 18 , wherein the seed layer comprises at least one of silicon or germanium. 
     
     
         20 . The isolation structure of  claim 18 , wherein the seed layer is further disposed on a portion of side surfaces of the trench. 
     
     
         21 . The isolation structure of  claim 18 , wherein the trench has a vertically elongated shape. 
     
     
         22 . The isolation structure of  claim 18 , wherein the isolation structure is disposed between two semiconductor devices to provide electrical isolation.