US2019198564A1PendingUtilityA1
Monolithic segmented led array architecture with islanded epitaxial growth
Est. expiryDec 20, 2037(~11.4 yrs left)· nominal 20-yr term from priority
Inventors:Ashish TandonRajat SharmaJoseph FlemishAndrei PapouWen YuErik William YoungYu-Chen ShenLuke Gordon
H01S 5/00F21S 41/153H01L 33/507H01L 33/305H01L 33/007H01L 27/156H10H 20/851H10H 20/84H10H 20/82H10H 20/0361H10H 20/825H10H 20/018H10H 20/813H10H 20/8314H10H 20/83H10H 20/032H10H 20/8515H10H 20/8514H10H 20/8512H10H 20/8242H10H 20/01335H10H 20/819H10H 29/142
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Claims
Abstract
A device may include a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer. The device may include a first sidewall and a second sidewall on a second surface of the epitaxial layer distal to the first isolation region and the second isolation region. The device may include a wavelength converting layer on the epitaxial layer between the first sidewall and the second sidewall.
Claims
exact text as granted — not AI-modified1 . A device comprising:
a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer; a first sidewall and a second sidewall on a second surface of the epitaxial layer distal to the first isolation region and the second isolation region; and a wavelength converting layer on the epitaxial layer between the first sidewall and the second sidewall.
2 . The device of claim 1 , wherein the first sidewall and the second sidewall comprise portions of the epitaxial layer formed in trenches etched into a sapphire substrate.
3 . The device of claim 1 , wherein the epitaxial layer comprises:
a first semiconductor layer; an active region on the first semiconductor layer; and a second semiconductor layer on the active region.
4 . The device of claim 3 , wherein the first semiconductor layer comprises an n-type doped Type III-nitride and the second semiconductor layer a p-type doped III-nitride.
5 . The device of claim 3 , wherein the active region comprises a partially doped or undoped Type III-nitride.
6 . The device of claim 3 , wherein the active region extends beyond an outer edge of at least one of the first isolation region and the second isolation region.
7 . The device of claim 1 , wherein the first isolation region and the second isolation region comprise a dielectric material.
8 . The device of claim 1 , wherein the epitaxial layer comprises a Type III-nitride.
9 . The device of claim 1 , wherein the first sidewall is aligned with the first isolation region and the second sidewall is aligned with the second isolation region.
10 . A light emitting diode (LED) array, comprising:
an isolation region between a first metal contact on a first LED and a second metal contact on a second LED; one or more sidewalls on the first LED and on the second LED, the one or more sidewalls distal to the isolation region; and a wavelength converting layer on the first LED and the second LED between the one or more sidewalls.
11 . The LED array of claim 10 , wherein the first LED and the second LED comprise a common active region.
12 . The LED array of claim 10 , wherein the first LED and the second LED comprise:
a first semiconductor layer; an active region on the first semiconductor layer; and a second semiconductor layer on the active region.
13 . The LED array of claim 10 , wherein a sidewall of the one or more sidewalls is aligned with the isolation region.
14 . A method of forming a device, the method comprising:
forming a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer; and forming a wavelength converting layer on a second surface of the epitaxial layer between the first sidewall and the second sidewall, the first surface distal to the second surface.
15 . The method of claim 14 , wherein the first sidewall and the second sidewall comprise portions of the epitaxial layer formed in trenches etched into a sapphire substrate.
16 . The method of claim 14 , wherein the epitaxial layer comprises:
a first semiconductor layer; an active region on the first semiconductor layer; and a second semiconductor layer on the active region.
17 . The method of claim 16 , wherein the first semiconductor layer comprises an n-type doped Type III-nitride and the second semiconductor layer a p-type doped Type III-nitride.
18 . The method of claim 16 , wherein the active region comprises a partially doped or undoped Type III-nitride.
19 . The method of claim 16 , wherein the active region extends beyond an outer edge of at least one of the first isolation region and the second isolation region.
20 . The method of claim 14 , wherein the first sidewall is aligned with the first isolation region and the second sidewall is aligned with the second isolation region.Join the waitlist — get patent alerts
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