Semiconductor device

Abstract

A semiconductor device includes an active layer, source electrodes, drain electrodes, gate electrodes, an insulating layer, gate metal layers, source metal layers, and drain metal layers. The source electrodes, drain electrodes, and gate electrodes are over the active layer, in which each of the gate electrodes includes a plurality of narrow portions and wider portions alternately arranged, and the wider portions of one of the gate electrodes extend toward the source electrode and directly connected to the wider portions of another one of the gate electrodes. The insulating layer is over the source electrodes, the drain electrodes, and the gate electrodes. The gate metal layers are over the gate electrodes and the insulating layer. The source metal layers are over the source electrodes and the insulating layer. The drain metal layers are over the drain electrodes and the insulating layer.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 an active layer;   a plurality of source electrodes, drain electrodes, and gate electrodes over the active layer, wherein each of the gate electrodes comprises a plurality of narrow portions and wider portions alternately arranged, and the wider portions of one of the gate electrodes extend toward the source electrodes and are directly connected to the wider portions of another one of the gate electrodes;   an insulating layer over the source electrodes, the drain electrodes, and the gate electrodes;   a plurality of gate metal layers over the gate electrodes and the insulating layer;   a plurality of source metal layers over the source electrodes and the insulating layer; and   a plurality of drain metal layers over the drain electrodes and the insulating layer.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the gate metal layers and the gate electrodes have substantially the same pattern. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the source electrodes comprise a plurality of source blocks spaced from each other. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the source blocks are disposed between the connected gate electrodes. 
     
     
         5 . The semiconductor device of  claim 3 , wherein the wider portions of the gate electrodes extend to spaces between the source blocks of the source electrodes. 
     
     
         6 . The semiconductor device of  claim 3 , wherein at least one of the source blocks is enclosed by the gate electrodes. 
     
     
         7 . The semiconductor device of  claim 1 , wherein a projection of all of the gate electrodes onto the active layer in a direction normal to an upper surface of the active layer is separated from a projection of the source electrodes onto the active layer in a direction normal to an upper surface of the active layer and a projection of the drain electrodes onto the active layer in a direction normal to an upper surface of the active layer. 
     
     
         8 . A semiconductor device comprising:
 an active layer;   a plurality of source electrodes, drain electrodes, and gate electrodes over the active layer, wherein each of the source electrodes comprises a plurality of source blocks spaced from each other;   an insulating layer over the source electrodes, the drain electrodes, and the gate electrodes;   a plurality of gate metal layers over the gate electrodes and the insulating layer;   a plurality of source metal layers over the source electrodes and the insulating layer; and   a plurality of drain metal layers over the drain electrodes and the insulating layer.   
     
     
         9 . The semiconductor device of  claim 8 , wherein portions of the gate electrodes extend to spaces between the source blocks of the source electrodes. 
     
     
         10 . The semiconductor device of  claim 9 , further comprising a plurality of vias electrically connecting the gate electrodes to the gate metal layers, wherein the vias are directly connected to the portions of the gate electrodes extending to the spaces between the source blocks of the source electrodes. 
     
     
         11 . The semiconductor device of  claim 8 , wherein each of the gate electrodes comprises a plurality of narrow portions and wider portions alternately arranged. 
     
     
         12 . The semiconductor device of  claim 11 , wherein the wider portions of one of the gate electrodes extend toward the source electrode and are directly connected to the wider portions of another one of the gate electrodes. 
     
     
         13 . The semiconductor device of  claim 11 , wherein the narrow portions and the wider portions are alternately arranged along a direction, and the source blocks are arranged along the direction. 
     
     
         14 . The semiconductor device of  claim 8 , wherein at least one of the source metal layers comprises a plurality of source blocks spaced from each other, and the source blocks of the at least one of the source metal layers overlap the source blocks of the at least one of the source electrodes. 
     
     
         15 . A semiconductor device comprising:
 an active layer;   a plurality of source electrodes, drain electrodes, and gate electrodes over the active layer, wherein at least two of the gate electrodes form a ladder-shape;   an insulating layer over the source electrodes, the drain electrodes, and the gate electrodes;   a plurality of gate metal layers over the gate electrodes and the insulating layer;   a plurality of source metal layers over the source electrodes and the insulating layer; and   a plurality of drain metal layers over the drain electrodes and the insulating layer.   
     
     
         16 . The semiconductor device of  claim 15 , wherein at least one of the source electrodes comprises a plurality of source blocks. 
     
     
         17 . The semiconductor device of  claim 16 , wherein the source blocks of the source electrodes are disposed between the gate electrodes formed in ladder-shape. 
     
     
         18 . The semiconductor device of  claim 16 , wherein the source blocks of the source electrodes are spaced from each other by the gate electrodes formed in ladder-shape. 
     
     
         19 . The semiconductor device of  claim 15 , wherein at least one of the source blocks of the source electrode is surrounded by the gate electrodes. 
     
     
         20 . The semiconductor device of  claim 15 , wherein at least two of the gate metal layers form a ladder-shape.