Compact device structures for a bipolar junction transistor
Abstract
Device structures for a bipolar junction transistor and methods for fabricating a device structure using a substrate. One or more primary trench isolation regions are formed that surround an active device region of the substrate and a collector contact region of the substrate. A base layer is formed on the active device region and the collector contact region, and the active device region includes a collector. Each primary trench isolation region extends vertically to a first depth into the substrate. A trench is formed laterally located between the base layer and the collector contact region and that extends vertically through the base layer and into the substrate to a second depth that is less than the first depth. A dielectric is formed in the trench to form a secondary trench isolation region. An emitter is formed on the base layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A device structure formed using a substrate, the device structure comprising:
one or more primary trench isolation regions surrounding an active device region of the substrate and a first collector contact region of the substrate, each primary trench isolation region extending vertically to a first depth into the substrate, and the active device region comprising a collector; a base layer on the active device region; an emitter on the base layer; a first secondary trench isolation region extending in a vertical direction through the base layer and into the substrate to a second depth that is less than the first depth, the first secondary trench isolation region laterally located between the base layer and the first collector contact region; and a second secondary trench isolation region extending in the vertical direction through the base layer and into the substrate to the second depth.
2 . The device structure of claim 1 wherein the one or more primary trench isolation regions further surround a second collector contact region of the substrate, and the second secondary trench isolation region is laterally located between the base layer and the second collector contact region.
3 . The device structure of claim 2 wherein the emitter includes a first emitter finger and a second emitter finger, the first secondary trench isolation region is laterally located between the first emitter finger and the first collector contact region, and the second secondary trench isolation region is laterally located between the second emitter finger and the second collector contact region.
4 . The device structure of claim 2 wherein the emitter includes a first emitter finger and a second emitter finger, a portion of the first secondary trench isolation region is juxtaposed with the base layer at a first edge of the base layer, a portion of the second secondary trench isolation region is juxtaposed with the base layer at a second edge of the base layer, and the first emitter finger and the second emitter finger are laterally located between the first edge of the base layer and the second edge of the base layer.
5 . The device structure of claim 2 wherein the emitter includes a first emitter finger and a second emitter finger, and further comprising:
a third secondary trench isolation region extending in the vertical direction through the base layer and into the substrate to the second depth, the third secondary trench isolation region laterally located between the first emitter finger and the second emitter finger.
6 . The device structure of claim 5 further comprising:
an extrinsic base layer on a top surface of the semiconductor layer and a top surface of the third secondary trench isolation region; and
a contact coupled by the extrinsic base layer with the base layer,
wherein the contact is aligned with the third secondary trench isolation region.
7 . The device structure of claim 6 wherein the base layer has a top surface and further comprising:
a base dielectric layer on the top surface of the base layer; and
a semiconductor layer over the base dielectric layer,
wherein the third secondary trench isolation region extends through the semiconductor layer and the base dielectric layer.
8 . The device structure of claim 1 wherein first secondary trench isolation region and the second secondary trench isolation region each project above a top surface of the base layer.
9 . The device structure of claim 1 wherein the first collector contact region is laterally located between the first secondary trench isolation region and the second secondary trench isolation region.
10 . The device structure of claim 9 wherein the emitter includes a first emitter finger and a second emitter finger, a portion of the first secondary trench isolation region is juxtaposed with the base layer at a first edge of the base layer, a portion of the second secondary trench isolation region is juxtaposed with the base layer at a second edge of the base layer, and the first edge of the base layer and the second edge of the base layer are laterally located between the first emitter finger and the second emitter finger.
11 . The device structure of claim 10 wherein the first emitter finger is arranged over a first section of the base layer, the second emitter finger is arranged over a second section of the base layer, and the first collector contact region is laterally arranged between the first section of the base layer and the second section of the base layer.
12 . The device structure of claim 9 further comprising:
an extrinsic base layer on a top surface of the semiconductor layer and a top surface of the first secondary trench isolation region; and
a contact coupled by the extrinsic base layer with the base layer,
wherein the contact is laterally arranged completely outside of a boundary established between one of the one or more primary trench isolation regions and the active device region, and the first secondary trench isolation region is laterally arranged completely inside of the boundary.
13 . The device structure of claim 12 wherein the contact is arranged over the one of the one or more primary trench isolation regions.
14 . The device structure of claim 1 wherein the first secondary trench isolation region is arranged in a first trench that includes first sidewalls that are inclined relative to the vertical direction.
15 . The device structure of claim 14 wherein the first sidewalls of the first trench undercut a portion of the base layer.
16 . The device structure of claim 14 wherein the second secondary trench isolation region is arranged in a second trench that includes second sidewalls that are inclined relative to the vertical direction.
17 . The device structure of claim 1 wherein the first secondary trench isolation region and the second secondary trench isolation region are formed in respective trenches that each include sidewalls that extend in the vertical direction.
18 . The device structure of claim 17 wherein first secondary trench isolation region and the second secondary trench isolation region each project above a top surface of the base layer.
19 . The device structure of claim 1 wherein one or more primary trench isolation regions have a boundary with the active device region of the substrate, the first secondary trench isolation region is arranged in a first trench having a longitudinal axis, and the first trench that terminates at opposite first ends along the longitudinal axis inside the boundary.
20 . The device structure of claim 19 wherein the second secondary trench isolation region is arranged in a second trench having a second longitudinal axis, and the second trench that terminates at opposite second ends along the longitudinal axis inside the boundary.Join the waitlist — get patent alerts
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