Dual-curvature cavity for epitaxial semiconductor growth

Abstract

Methods of forming a field-effect transistor and structures for a field-effect transistor. A gate structure is formed that overlaps with a channel region in a semiconductor fin. The semiconductor fin is etched with a first etching process to form a first cavity extending into the semiconductor fin adjacent to the channel region. The semiconductor fin is etched with a second etching process to form a second cavity that is volumetrically smaller than the first cavity and that adjoins the first cavity.

What is claimed is: 
     
         1 . A structure for a field-effect transistor, the structure comprising:
 a semiconductor fin including a channel region, a first cavity, and a second cavity that is volumetrically smaller than the first cavity and that adjoins the first cavity, the first cavity having a first curved sidewall, the second cavity having a second curved sidewall with a smaller radius of curvature than the first curved sidewall of the first cavity, and the second curved sidewall of the second cavity intersecting the first curved sidewall of the first cavity;   a gate structure that overlaps with the channel region adjacent to the channel region; and   a source/drain region including a first section in the first cavity and a second section in the second cavity.   
     
     
         2 . The structure of  claim 1  wherein the semiconductor fin is free of sidewall spacers vertically adjacent to the source/drain region. 
     
     
         3 . The structure of  claim 1  wherein the first cavity extends from a top surface of the semiconductor fin to a first depth, and the first cavity is arranged between the second cavity and the top surface of the semiconductor fin. 
     
     
         4 . The structure of  claim 1  wherein the second cavity is centered with respect to the first cavity. 
     
     
         5 . The structure of  claim 1  wherein the gate structure includes a gate electrode, and further comprising:
 a sidewall spacer arranged adjacent to the gate electrode, 
 wherein the first cavity undercuts the sidewall spacer. 
 
     
     
         6 . The structure of  claim 1  further comprising:
 a shallow trench isolation region, 
 wherein the source/drain region is arranged between the curved sidewall of the first cavity and the shallow trench isolation region, and the source/drain region is arranged between the curved sidewall of the second cavity and the shallow trench isolation region. 
 
     
     
         7 . The structure of  claim 6  wherein the first cavity is arranged over the second cavity, and the first cavity includes a third sidewall that differs in shape from the first sidewall. 
     
     
         8 . The structure of  claim 6  wherein the source/drain region has an asymmetric shape. 
     
     
         9 . The structure of  claim 8  wherein the first cavity is arranged over the second cavity, and the source/drain region has a first shape adjacent to the first sidewall of the first cavity and a second shape adjacent to the third sidewall of the first cavity, and the first shape differs from the second shape.