US2019172845A1PendingUtilityA1
Array Structure, Manufacturing Method Thereof, Array Substrate and Display Device
Assignee: BOE TECHNOLOGY GROUP CO LTDPriority: Nov 15, 2013Filed: Jan 24, 2019Published: Jun 6, 2019
Est. expiryNov 15, 2033(~7.3 yrs left)· nominal 20-yr term from priority
G02F 1/13458G02F 1/1368G02F 1/136227H10W 72/20H01L 27/124H01L 2224/10H01L 27/1259H10D 86/451H10D 86/021H10D 30/6729H10D 30/673H10D 86/441H10D 86/60H10D 86/0221H10D 86/40
65
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
An array structure and a manufacturing method thereof are disclosed. The method for manufacturing the array structure includes: forming a gate insulating layer on a substrate; and etching the gate insulating layer at a position corresponding to a source/drain signal access terminal to form a through-hole structure provided with an outward-inclined side wall in the gate insulating layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for manufacturing an array structure, comprising:
forming a gate insulating layer on a substrate; and etching the gate insulating layer at a position corresponding to a source/drain signal access terminal to form a through-hole structure provided with an outward-inclined side wall in the gate insulating layer.
2 . The method for manufacturing the array structure according to claim 1 , further comprising: forming a source/drain layer on the gate insulating layer and at a position corresponding to the through-hole structure of the gate insulating layer, wherein a concavity provided with an outward-inclined side wall is formed in the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.
3 . The method for manufacturing the array structure according to claim 2 , further comprising:
forming a passivation layer on the source/drain layer and etching the passivation layer; and forming a conductive film on the passivation layer, wherein the passivation layer is provided with a through-hole structure which comprises an outward-inclined side wall at the position corresponding to the through-hole structure of the gate insulating layer.
4 . The method for manufacturing the array structure according to claim 3 , wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.
5 . The method for manufacturing the array structure according to claim 3 , further comprising: forming another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.
6 . An array structure, comprising:
a substrate; and a gate insulating layer provided on the substrate and provided with a through-hole structure which comprises an outward-inclined side wall.
7 . The array structure according to claim 6 , further comprising a source/drain layer formed on the gate insulating layer and provided with a concavity which comprises an outward-inclined side wall at a position corresponding to the through-hole structure of the gate insulating layer.
8 . The array structure according to claim 7 , further comprising:
a passivation layer formed on the source/drain layer and provided with a through-hole structure which comprises an outward-inclined side wall at the position corresponding to the through-hole structure of the gate insulating layer; and a conductive film formed on the passivation layer.
9 . The array structure according to claim 8 , wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the gate insulating layer.
10 . The array structure according to claim 8 , further comprising: another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.
11 . An array structure, comprising:
a gate insulating layer provided on a substrate; and a source/drain layer provided on the gate insulating layer and provided with a through-hole structure which comprises an outward-inclined side wall.
12 . The array structure according to claim 11 , further comprising:
a passivation layer formed on the source/drain layer and provided with a through-hole structure, which comprises an outward-inclined side wall, at a position corresponding to the through hole of the source/drain layer; and a conductive film formed on the passivation layer.
13 . The array structure according to claim 12 , wherein the conductive film is electrically connected with the source/drain layer at the position corresponding to the through-hole structure of the source/drain layer.
14 . The array structure according to claim 12 , further comprising: another conductive film at a position corresponding to a gate signal access terminal, wherein
the conductive film and the another conductive film have a same height on the substrate.Join the waitlist — get patent alerts
Track US2019172845A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.