US2019172702A1PendingUtilityA1

Semiconductor device and method for manufacturing semiconductor device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Feb 8, 2012Filed: Jan 24, 2019Published: Jun 6, 2019
Est. expiryFeb 8, 2032(~5.5 yrs left)· nominal 20-yr term from priority
H10P 14/6319H10P 14/6314H10P 14/3434H10P 14/3426H10P 14/22H10P 14/2901H01L 21/02565H01L 21/02631H01L 21/02252H01L 29/04H01L 29/7869H01L 29/6656H01L 29/78693H01L 21/02244H01L 21/0237H01L 21/02554H10D 64/021H10D 62/40H10D 30/6756H10D 30/6755
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Claims

Abstract

Provided is a highly reliable semiconductor device which includes a transistor including an oxide semiconductor. The semiconductor device includes an oxide semiconductor layer; a gate insulating layer provided over the oxide semiconductor layer; a gate electrode layer overlapping with the oxide semiconductor layer with the gate insulating layer provided therebetween; an insulating layer being in contact with part of an upper surface of the oxide semiconductor layer, covering a side surface of the gate insulating layer and a side surface and an upper surface of the gate electrode layer, and having a lower oxygen-transmitting property than the gate insulating layer; a sidewall insulating layer provided on the side surface of the gate electrode layer with the insulating layer provided therebetween; a source electrode layer and a drain electrode layer which are electrically connected to the oxide semiconductor layer.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 an oxide semiconductor layer;   a source electrode layer in contact with a first part of an upper surface of the oxide semiconductor layer and a first side surface of the oxide semiconductor layer;   a drain electrode layer in contact with a second part of the upper surface of the oxide semiconductor layer and a second side surface of the oxide semiconductor layer;   a gate insulating layer over the oxide semiconductor layer;   a gate electrode layer over the gate insulating layer;   a first insulating layer in contact with the gate insulating layer;   a second insulating layer covering a side surface and an upper surface of the gate electrode layer;   a first wiring layer in contact with an upper surface of the source electrode layer; and   a second wiring layer in contact with an upper surface of the drain electrode layer,   wherein the gate insulating layer comprises silicon oxide or silicon oxynitride,   wherein the first insulating layer comprises an oxide film comprising aluminum,   wherein the second insulating layer comprises silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide, and   wherein a part of the first wiring layer in contact with the source electrode layer overlaps with the first side surface of the oxide semiconductor layer.   
     
     
         3 . A semiconductor device comprising:
 an oxide semiconductor layer;   a source electrode layer in contact with a first part of an upper surface of the oxide semiconductor layer and a first side surface of the oxide semiconductor layer;   a drain electrode layer in contact with a second part of the upper surface of the oxide semiconductor layer and a second side surface of the oxide semiconductor layer;   a gate insulating layer over the oxide semiconductor layer;   a gate electrode layer over the gate insulating layer;   a first insulating layer in contact with the gate insulating layer;   a second insulating layer in contact with the first insulating layer, the second insulating layer covering a side surface and an upper surface of the gate electrode layer;   a first wiring layer in contact with an upper surface of the source electrode layer; and   a second wiring layer in contact with an upper surface of the drain electrode layer,   wherein the gate insulating layer comprises silicon oxide or silicon oxynitride,   wherein the first insulating layer comprises an oxide film comprising aluminum,   wherein the second insulating layer comprises silicon oxide, silicon nitride, silicon oxynitride, or silicon nitride oxide,   wherein a part of the first wiring layer in contact with the source electrode layer overlaps with the first side surface of the oxide semiconductor layer, and   wherein a part of the second wiring layer in contact with the drain electrode layer overlaps with the second side surface of the oxide semiconductor layer.

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