Max pooling in a matrix processing architecture

Abstract

In one embodiment, an apparatus comprises a multi-dimensional memory and a plurality of processing elements to perform a matrix operation, wherein the matrix operation comprises a max pooling operation on one or more matrix operands. The plurality of processing elements comprises one or more matrix processors, and the plurality of processing elements is configured to: receive matrix data from the multi-dimensional memory, wherein the matrix data is associated with the one or more matrix operands; extract the one or more matrix operands from the matrix data; perform the max pooling operation using the one or more matrix operands; and obtain a result of the max pooling operation.

1 - 25 . (canceled) 
     
     
         26 . A matrix processing circuit, comprising:
 a plurality of memory resource blocks;   control circuitry to cause the matrix processing circuit to perform a backward pooling operation, wherein the backward pooling operation is to generate, based on a pooled matrix operand, a partially reconstructed matrix corresponding to an original matrix operand, wherein the pooled matrix operand corresponds to an output of a forward pooling operation performed on the original matrix operand;   read circuitry to receive the pooled matrix operand from one or more of the plurality of memory resource blocks;   slice circuitry to:
 extract a plurality of value-index pairs from the pooled matrix operand; and 
 for each value-index pair of the plurality of value-index pairs:
 generate, based on the value-index pair, a corresponding portion of the partially reconstructed matrix; 
 identify a completed portion of the partially reconstructed matrix to write to memory, wherein the completed portion will not be modified during generation of a remaining portion of the partially reconstructed matrix; and 
 write the completed portion of the partially reconstructed matrix to one or more of the plurality of memory resource blocks; and 
 
   output circuitry to output the partially reconstructed matrix as a result of the backward pooling operation.   
     
     
         27 . The matrix processing circuit of  claim 26 , further comprising a first in first out (FIFO) memory to store a sliding window of elements associated with the partially reconstructed matrix. 
     
     
         28 . The matrix processing circuit of  claim 27 , wherein the completed portion of the partially reconstructed matrix comprises one or more elements at a front of the FIFO memory. 
     
     
         29 . The matrix processing circuit of  claim 28 , wherein a number of elements within the completed portion is based on a stride parameter of the backward pooling operation. 
     
     
         30 . The matrix processing circuit of  claim 27 , wherein the FIFO memory comprises one or more status bits to track whether each element in the sliding window of elements has been modified. 
     
     
         31 . The matrix processing circuit of  claim 26 , wherein the forward pooling operation is to generate the pooled matrix operand based on the original matrix operand, wherein the pooled matrix operand is smaller in size than the original matrix operand. 
     
     
         32 . The matrix processing circuit of  claim 31 , wherein the forward pooling operation comprises a max pooling operation. 
     
     
         33 . The matrix processing circuit of  claim 26 , wherein:
 the forward pooling operation is associated with forward propagation in an artificial neural network; and   the backward pooling operation is associated with backward propagation in the artificial neural network.   
     
     
         34 . A system, comprising:
 a processor to execute a plurality of instructions associated with an application, wherein the plurality of instructions comprises one or more instructions associated with a backward pooling operation, wherein the backward pooling operation is to generate, based on a pooled matrix operand, a partially reconstructed matrix corresponding to an original matrix operand, wherein the pooled matrix operand corresponds to an output of a forward pooling operation performed on the original matrix operand; and   matrix processing circuitry to perform the backward pooling operation, wherein the matrix processing circuitry comprises:
 a plurality of memory resource blocks; and 
 circuitry to:
 receive the pooled matrix operand from one or more of the plurality of memory resource blocks; 
 extract a plurality of value-index pairs from the pooled matrix operand; 
 for each value-index pair of the plurality of value-index pairs:
 generate, based on the value-index pair, a corresponding portion of the partially reconstructed matrix; 
 identify a completed portion of the partially reconstructed matrix to write to memory, wherein the completed portion will not be modified during generation of a remaining portion of the partially reconstructed matrix; and 
 write the completed portion of the partially reconstructed matrix to one or more of the plurality of memory resource blocks; and 
 
 output the partially reconstructed matrix as a result of the backward pooling operation. 
 
   
     
     
         35 . The system of  claim 34 , wherein the matrix processing circuitry further comprises a first in first out (FIFO) memory to store a sliding window of elements associated with the partially reconstructed matrix. 
     
     
         36 . The system of  claim 35 , wherein the completed portion of the partially reconstructed matrix comprises one or more elements at a front of the FIFO memory. 
     
     
         37 . The system of  claim 36 , wherein a number of elements within the completed portion is based on a stride parameter of the backward pooling operation. 
     
     
         38 . The system of  claim 35 , wherein the FIFO memory comprises one or more status bits to track whether each element in the sliding window of elements has been modified. 
     
     
         39 . The system of  claim 34 , wherein the forward pooling operation is to generate the pooled matrix operand based on the original matrix operand, wherein the pooled matrix operand is smaller in size than the original matrix operand. 
     
     
         40 . The system of  claim 39 , wherein the forward pooling operation comprises a max pooling operation. 
     
     
         41 . At least one non-transitory machine accessible storage medium having instructions stored thereon, the instructions, when executed on a machine, cause the machine to:
 receive a command to perform a backward pooling operation, wherein the backward pooling operation is to generate, based on a pooled matrix operand, a partially reconstructed matrix corresponding to an original matrix operand, wherein the pooled matrix operand corresponds to an output of a forward pooling operation performed on the original matrix operand;   receive the pooled matrix operand from one or more of a plurality of memory resource blocks;   extract a plurality of value-index pairs from the pooled matrix operand;   for each value-index pair of the plurality of value-index pairs:
 generate, based on the value-index pair, a corresponding portion of the partially reconstructed matrix; 
 identify a completed portion of the partially reconstructed matrix to write to memory, wherein the completed portion will not be modified during generation of a remaining portion of the partially reconstructed matrix; and 
 write the completed portion of the partially reconstructed matrix to one or more of the plurality of memory resource blocks; and 
   output the partially reconstructed matrix as a result of the backward pooling operation.   
     
     
         42 . The storage medium of  claim 41 , wherein the instructions further cause the machine to store, on a first in first out (FIFO) memory, a sliding window of elements associated with the partially reconstructed matrix. 
     
     
         43 . The storage medium of  claim 42 , wherein the completed portion of the partially reconstructed matrix comprises one or more elements at a front of the FIFO memory. 
     
     
         44 . The storage medium of  claim 43 , wherein a number of elements within the completed portion is based on a stride parameter of the backward pooling operation. 
     
     
         45 . The storage medium of  claim 43 , wherein the instructions further cause the machine to determine whether the one or more elements at the front of the FIFO memory have been modified, wherein the FIFO memory comprises one or more status bits to track whether each element in the sliding window of elements has been modified. 
     
     
         46 . A method, comprising:
 receiving a command to perform a backward pooling operation, wherein the backward pooling operation is to generate, based on a pooled matrix operand, a partially reconstructed matrix corresponding to an original matrix operand, wherein the pooled matrix operand corresponds to an output of a forward pooling operation performed on the original matrix operand;   receiving the pooled matrix operand from one or more of a plurality of memory resource blocks;   extracting a plurality of value-index pairs from the pooled matrix operand;   for each value-index pair of the plurality of value-index pairs:
 generating, based on the value-index pair, a corresponding portion of the partially reconstructed matrix; 
 identifying a completed portion of the partially reconstructed matrix to write to memory, wherein the completed portion will not be modified during generation of a remaining portion of the partially reconstructed matrix; and 
 writing the completed portion of the partially reconstructed matrix to one or more of the plurality of memory resource blocks; and 
   outputting the partially reconstructed matrix as a result of the backward pooling operation.   
     
     
         47 . The method of  claim 46 , further comprising storing, on a first in first out (FIFO) memory, a sliding window of elements associated with the partially reconstructed matrix. 
     
     
         48 . The method of  claim 47 , wherein the completed portion of the partially reconstructed matrix comprises one or more elements at a front of the FIFO memory. 
     
     
         49 . The method of  claim 48 , wherein a number of elements within the completed portion is based on a stride parameter of the backward pooling operation. 
     
     
         50 . The method of  claim 48 , further comprising determining whether the one or more elements at the front of the FIFO memory have been modified, wherein the FIFO memory comprises one or more status bits to track whether each element in the sliding window of elements has been modified.