Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps

Abstract

A simplified method for forming pairs of non-volatile memory cells using two polysilicon depositions. A first polysilicon layer is formed on and insulated from the semiconductor substrate in a first polysilicon deposition process. A pair of spaced apart insulation blocks are formed on the first polysilicon layer. Exposed portions of the first poly silicon layer are removed while maintaining a pair of polysilicon blocks of the first polysilicon layer each disposed under one of the pair of insulation blocks. A second polysilicon layer is formed over the substrate and the pair of insulation blocks in a second polysilicon deposition process. Portions of the second polysilicon layer are removed while maintaining a first polysilicon block (disposed between the pair of insulation blocks), a second polysilicon block (disposed adjacent an outer side of one insulation block), and a third polysilicon block (disposed adjacent an outer side of the other insulation block).

What is claimed is: 
     
         1 . A method of forming a pair of non-volatile memory cells comprising:
 forming a first insulation layer on a semiconductor substrate;   forming a first polysilicon layer on the first insulation layer in a first polysilicon deposition process;   forming a pair of spaced apart insulation blocks on the first polysilicon layer, each of the insulation blocks having first sides facing toward each other and second sides facing away from each other;   removing portions of the first polysilicon layer while maintaining portions of the first polysilicon layer disposed underneath the pair of insulation blocks and between the pair of insulation blocks;   forming a pair of spaced apart insulation spacers adjacent the first sides and over a portion of the first polysilicon layer disposed between the pair of insulation blocks;   removing a portion of the first polysilicon layer disposed between the insulation spacers while maintaining a pair of polysilicon blocks of the first polysilicon layer each disposed under one of the pair of insulation blocks and one of the pair of insulation spacers;   forming a source region in the substrate and between the pair of insulation blocks;   removing the pair of insulation spacers;   forming insulation material that at least extends along an end portion of each of the pair of polysilicon blocks;   forming a second polysilicon layer over the substrate and the pair of insulation blocks in a second polysilicon deposition process;   removing portions of the second polysilicon layer while maintaining a first polysilicon block, a second polysilicon block and a third polysilicon block of the second polysilicon layer, wherein:
 the first polysilicon block is disposed between the pair of insulation blocks and over the source region, 
 the second polysilicon block is disposed adjacent the second side of one of the insulation blocks, and 
 the third polysilicon block is disposed adjacent the second side of another one of the insulation blocks; 
   forming a first drain region in the substrate and adjacent the second polysilicon block;   forming a second drain region in the substrate and adjacent the third polysilicon block;   removing the second and third polysilicon blocks;   forming a first metal block adjacent the second side of one of the insulation blocks; and   forming a second metal block adjacent the second side of another one of the insulation blocks.   
     
     
         2 . The method of  claim 1 , further comprising:
 forming a layer of high-K insulation material between the first metal block and the second side of one of the insulation blocks; and   forming a layer of high-K insulation material between the second metal block and the second side of another one of the insulation blocks.   
     
     
         3 . A method of forming a pair of non-volatile memory cells comprising:
 forming a first insulation layer on a semiconductor substrate;   forming a first polysilicon layer on the first insulation layer in a first polysilicon deposition process;   forming a pair of spaced apart insulation blocks on the first polysilicon layer, each of the insulation blocks having first sides facing toward each other and second sides facing away from each other;   removing portions of the first polysilicon layer while maintaining a pair of polysilicon blocks of the first polysilicon layer each disposed under one of the pair of insulation blocks;   forming insulation spacers adjacent the first and second sides;   removing the insulation spacers adjacent the first sides;   forming a source region in the substrate and between the pair of insulation blocks;   forming a layer of insulation material that at least extends along the first sides and along the insulation spacers adjacent the second sides;   forming a second polysilicon layer over the substrate and the pair of insulation blocks in a second polysilicon deposition process;   removing portions of the second polysilicon layer while maintaining a first polysilicon block, a second polysilicon block and a third polysilicon block of the second polysilicon layer, wherein:
 the first polysilicon block is disposed between the pair of insulation blocks and over the source region, 
 the second polysilicon block is disposed adjacent the second side of one of the insulation blocks, and 
 the third polysilicon block is disposed adjacent the second side of another one of the insulation blocks; 
   forming a first drain region in the substrate and adjacent the second polysilicon block; and   forming a second drain region in the substrate and adjacent the third polysilicon block.   
     
     
         4 . The method of  claim 3 , wherein:
 the first polysilicon block is insulated from the pair of polysilicon blocks of the first polysilicon layer by the layer of insulation material;   the second polysilicon block is insulated from one of the pair of polysilicon blocks of the first polysilicon layer by the layer of insulation material and one of the insulation spacers; and   the third polysilicon block is insulated from one of the pair of polysilicon blocks of the first polysilicon layer by the layer of insulation material and one of the insulation spacers.   
     
     
         5 . The method of  claim 3 , wherein the spaced apart insulation blocks are formed of nitride, oxide, or a composite of layers including both oxide and nitride. 
     
     
         6 . The method of  claim 3 , wherein the first insulation layer is formed of oxide or nitrogen treated oxide. 
     
     
         7 . The method of  claim 3 , further comprising:
 removing the second and third polysilicon blocks; and   forming a first metal block adjacent the second side of one of the insulation blocks;   forming a second metal block adjacent the second side of another one of the insulation blocks.   
     
     
         8 . The method of  claim 7 , further comprising:
 forming a layer of high-K insulation material between the first metal block and the second side of one of the insulation blocks; and   forming a layer of high-K insulation material between the second metal block and the second side of another one of the insulation blocks.   
     
     
         9 . A method of forming a pair of non-volatile memory cells comprising:
 forming a first insulation layer on a semiconductor substrate;   forming a first polysilicon layer on the first insulation layer in a first polysilicon deposition process;   forming a pair of spaced apart insulation blocks on the first polysilicon layer, each of the insulation blocks having first sides facing toward each other and second sides facing away from each other;   forming insulation spacers adjacent the first and second sides;   reducing a width of the insulation spacers adjacent the first sides;   removing portions of the first polysilicon layer while maintaining a pair of polysilicon blocks of the first polysilicon layer each disposed under one of the pair of insulation blocks and the insulation spacers adjacent the first and second sides of the one insulation block;   forming a source region in the substrate and between the pair of insulation blocks;   removing the insulation spacers to expose end portions of each of the pair of polysilicon blocks of the first polysilicon layer;   forming a layer of insulation material that at least extends along the exposed end portions of each of the pair of polysilicon blocks of the first polysilicon layer;   forming a second polysilicon layer over the substrate and the pair of insulation blocks in a second polysilicon deposition process;   removing portions of the second polysilicon layer while maintaining a first polysilicon block, a second polysilicon block and a third polysilicon block of the second polysilicon layer, wherein:
 the first polysilicon block is disposed between the pair of insulation blocks and over the source region, 
 the second polysilicon block is disposed adjacent the second side of one of the insulation blocks, and 
 the third polysilicon block is disposed adjacent the second side of another one of the insulation blocks; 
   forming a first drain region in the substrate and adjacent the second polysilicon block; and   forming a second drain region in the substrate and adjacent the third polysilicon block.   
     
     
         10 . The method of  claim 9 , wherein:
 the first polysilicon block includes a first portion laterally adjacent to the pair of polysilicon blocks of the first polysilicon layer, and a second portion that extends up and over the pair of polysilicon blocks of the first polysilicon layer;   the second polysilicon block includes a first portion laterally adjacent to one of the pair of polysilicon blocks of the first polysilicon layer, and a second portion that extends up and over the one of the pair of polysilicon blocks of the first polysilicon layer;   the third polysilicon block includes a first portion laterally adjacent to the other one of the pair of polysilicon blocks of the first polysilicon layer, and a second portion that extends up and over the other one of the pair of polysilicon blocks of the first polysilicon layer.   
     
     
         11 . The method of  claim 10 , wherein an amount of vertical overlap between the first polysilicon block and either of the pair of polysilicon blocks of the first polysilicon layer is less than an amount of vertical overlap between the second polysilicon block and the one of the pair of polysilicon blocks of the first polysilicon layer, and less than an amount of vertical overlap between the third polysilicon block and the other one of the pair of polysilicon blocks of the first polysilicon layer. 
     
     
         12 . The method of  claim 9 , wherein the spaced apart insulation blocks are formed of nitride, oxide, or a composite of layers including both oxide and nitride. 
     
     
         13 . The method of  claim 9 , wherein the first insulation layer is formed of oxide or nitrogen treated oxide. 
     
     
         14 . The method of  claim 9 , further comprising:
 removing the second and third polysilicon blocks; and   forming a first metal block adjacent the second side of one of the insulation blocks;   forming a second metal block adjacent the second side of another one of the insulation blocks.   
     
     
         15 . The method of  claim 14 , further comprising:
 forming a layer of high-K insulation material between the first metal block and the second side of one of the insulation blocks; and   forming a layer of high-K insulation material between the second metal block and the second side of another one of the insulation blocks.   
     
     
         16 . A method of forming a pair of non-volatile memory cells comprising:
 forming a first insulation layer on a semiconductor substrate;   forming a first polysilicon layer on the first insulation layer in a first polysilicon deposition process;   forming an insulation block on the first polysilicon layer having opposing first and second sides;   forming a first insulation spacer on the first polysilicon layer and adjacent the first side and a second insulation spacer on the first polysilicon layer and adjacent the second side;   removing portions of the first polysilicon layer while maintaining a polysilicon block of the first polysilicon layer disposed under the insulation block and first and second insulation spacers;   removing the insulation block;   removing a portion of the first polysilicon layer disposed between the first and second insulation spacers to form a first polysilicon block of the first polysilicon layer disposed under the first insulation spacer and a second polysilicon block of the first polysilicon layer disposed under the second insulation spacer;   forming a source region in the substrate and between the first and second insulation spacers;   forming insulation material that at least extends along an end portion of each of the first and second polysilicon blocks of the first polysilicon layer;   forming a second polysilicon layer over the substrate and the pair of insulation spacers in a second polysilicon deposition process;   removing portions of the second polysilicon layer while maintaining a third polysilicon block, a fourth polysilicon block and a fifth polysilicon block of the second polysilicon layer, wherein:
 the third polysilicon block is disposed between the pair of insulation spacers and over the source region, 
 the fourth polysilicon block is disposed adjacent the first insulation spacer, and 
 the fifth polysilicon block is disposed adjacent the second insulation spacer; 
   forming a first drain region in the substrate and adjacent the fourth polysilicon block; and   forming a second drain region in the substrate and adjacent the fifth polysilicon block.   
     
     
         17 . The method of  claim 16 , wherein before the removal of the insulation block, further comprising:
 performing a poly slope etch to an upper surface of the first polysilicon layer such the upper surface slopes downwardly as the upper surface extends away from the insulation block.   
     
     
         18 . The method of  claim 16 , wherein the third polysilicon block includes a first portion laterally adjacent to the first and second polysilicon blocks of the first polysilicon layer, and a second portion that extends up and over the first and second polysilicon blocks of the first polysilicon layer. 
     
     
         19 . The method of  claim 16 , wherein the insulation block is formed of nitride, oxide, or a composite of layers including both oxide and nitride. 
     
     
         20 . The method of  claim 16 , wherein the first insulation layer is formed of oxide or nitrogen treated oxide. 
     
     
         21 . The method of  claim 16 , further comprising:
 removing the fourth and fifth polysilicon blocks; and   forming a first metal block adjacent the first insulation spacer;   forming a second metal block adjacent the second insulation spacer.   
     
     
         22 . The method of  claim 21 , further comprising:
 forming a layer of high-K insulation material between the first metal block and the first insulation spacer; and   forming a layer of high-K insulation material between the second metal block and the second insulation spacer.