Jctvc-l0226: vps and vps_extension updates

Abstract

The VPS and vps_extension( ) syntax structures are updated with some cleanups for the HEVC Extensions in scalable video coding, multi-view coding and 3D video coding areas. In addition, four options of adding syntaxes to support mixed video sequences in various layers for the VPS extension are described.

1 - 32 . (canceled) 
     
     
         33 . An image processing method, comprising:
 in an image processing apparatus comprising at least one processor:
 generating a bitstream by encoding image data, wherein the bitstream includes a video parameter set (VPS) syntax, and wherein a byte-alignment syntax in the VPS syntax is under a condition of a VPS extension flag; and 
 transmitting the generated bitstream. 
   
     
     
         34 . The image processing method of  claim 33 ,
 wherein the byte-alignment syntax is included in the VPS syntax based on a determination that the VPS extension flag is true.   
     
     
         35 . The image processing method of  claim 33 ,
 wherein the bitstream is generated with a coding tree unit as a unit.   
     
     
         36 . The image processing method of  claim 33 , further comprising filtering reference image data for motion compensation as a deblock filter. 
     
     
         37 . The image processing method of  claim 36 , further comprising filtering reference image data applied to the deblock filter as a sample adaptive offset (SAO) processing. 
     
     
         38 . An image processing apparatus, comprising:
 at least one processor configured to:
 generate a bitstream by encoding image data, wherein the bitstream includes a video parameter set (VPS) syntax, and wherein a byte-alignment syntax in the VPS syntax is under a condition of a VPS extension flag; and 
 transmit the generated bitstream. 
   
     
     
         39 . The image processing apparatus of  claim 38 ,
 wherein the byte-alignment syntax is included in the VPS syntax based on a determination that the VPS extension flag is true.   
     
     
         40 . The image processing apparatus of  claim 38 , wherein the generation of the bitstream is with a coding tree unit as a unit. 
     
     
         41 . The image processing apparatus of  claim 38 , wherein the at least one processor is further configured to filter reference image data for motion compensation as a deblock filter. 
     
     
         42 . The image processing apparatus of  claim 41 , wherein the at least one processor is further configured to filter reference image data applied to the deblock filter as a sample adaptive offset (SAO) processing.