Semiconductor structure and method for preparing the same

Abstract

The present disclosure provides a method for preparing a semiconductor structure including the following steps: Providing a substrate including a first region and a second region defined thereon, forming a first mask structure over the substrate, forming a plurality of first features in the first mask structure in the first region, forming a second mask structure over the first mask structure, simultaneously forming a plurality of second features in the second mask structure in the second region and a plurality of third features in the second mask structure in the first region, and transferring the second features and the third features to the first mask structure to simultaneously form a plurality of islanding features in the first region and a plurality of line features in the second region.

1 . A method for preparing a semiconductor structure, comprising:
 providing a substrate comprising a first region and a second region defined thereon;   forming a first mask structure over the substrate;   forming a plurality of first features extending in a first direction in the first mask structure in the first region;   forming a second mask structure over the first mask structure;   simultaneously forming a plurality of second features in the second region and a plurality of third features in the first region in the second mask structure, the second features extending in the first direction and the third features extending in a second direction different from the first direction; and   transferring the second features and the third features to the first mask structure to simultaneously form a plurality of islanding features in the first region and a plurality of line features in the second region.   
     
     
         2 . The method of  claim 1 , wherein the forming the first features further comprises:
 forming a plurality of first patterns over the first mask structure;   forming a plurality of spacers over sidewalls of each first pattern;   forming a plurality of second patterns over the first mask structure;   removing the spacers to form a plurality of openings between the first patterns and the second patterns; and   etching the first mask structure through the openings to form the first features.   
     
     
         3 . The method of  claim 1 , wherein the second mask structure fills spaces between the first features to form an even surface. 
     
     
         4 . The method of  claim 1 , wherein the forming the second features and the third features further comprises:
 forming a plurality of third patterns in the first region and a plurality of fourth patterns in the second region over the second mask structure;   forming a plurality of fifth patterns in the first region and a plurality of sixth patterns in the second region over the second mask structure, wherein the third patterns and the fifth patterns are alternately arranged, and the fourth patterns and the sixth patterns are alternately arranged; and   transferring the third patterns, the fourth patterns, the fifth patterns, and the sixth patterns to the second mask structure to form the second features and the third features.   
     
     
         5 . The method of  claim 4 , wherein the third patterns and the fifth patterns extend in the second direction, and the fourth patterns and the sixth patterns extend in the first direction. 
     
     
         6 . The method of  claim 4 , wherein distances between adjacent third and fifth patterns are the same. 
     
     
         7 . The method of  claim 4 , wherein distances between adjacent fourth and sixth patterns are the same. 
     
     
         8 . The method of  claim 1 , further comprising forming a frame feature between the first region and the second region. 
     
     
         9 . The method of  claim 8 , wherein the third features are in contact with the frame features. 
     
     
         10 . The method of  claim 8 , wherein at least a portion of the frame feature is adjacent to one of the second features. 
     
     
         11 . The method of  claim 1 , further comprising transferring the islanding features and the line features from the first mask structure to the substrate to form a plurality of islanding structures in the first region and a plurality of line structures in the second region. 
     
     
         12 . The method of  claim 1 , wherein the first direction and the second direction comprise an included angle, and the included angle is equal to or less than 90°. 
     
     
         13 . A semiconductor structure comprising:
 a substrate comprising a first region and a second region defined thereon;   a plurality of islanding structures disposed in the first region, the islanding structures being arranged in a first direction and a second direction to form an array, wherein the first direction and the second direction are different from each other;   a plurality of line structures disposed in the second region, and the line structures extending in the first direction; and   a frame structure including a portion disposed between the first region and the second region and extending in the first direction, the frame structure being adjacent to one of the line structures, and a distance between the frame structure and its adjacent line structure being greater than a distance between two adjacent line structures.   
     
     
         14 . The semiconductor structure of  claim 13 , wherein the islanding structures, the line structures and the frame structure comprise a same material. 
     
     
         15 . The semiconductor structure of  claim 13 , wherein distances between adjacent pairs of islanding structures in the first direction are the same, and distances between adjacent pairs of islanding structures in the second direction are the same. 
     
     
         16 . The semiconductor structure of  claim 13 , wherein the frame structure surrounds the array formed by the islanding structures. 
     
     
         17 . The semiconductor structure of  claim 13 , wherein a width of the frame structure is greater than a width of the line structures, and the width of the frame structure is greater than a width of the islanding structures. 
     
     
         18 . The semiconductor structure of  claim 13 , further comprising at least a dummy structure disposed between one of the islanding structures and the frame structure. 
     
     
         19 . The semiconductor structure of  claim 18 , wherein the dummy structure is in contact with the frame structure. 
     
     
         20 . The semiconductor structure of  claim 13 , wherein the first direction and the second direction comprise an included angle, and the included angle is equal to or less than 90°.