Bipolar transistor on high-resistivity substrate

Abstract

Systems and methods are disclosed for processing radio frequency (RF) signals using one or more field-effect transistors disposed on or above a high-resistivity region of a substrate. The substrate may include, for example, bulk silicon, at least a portion of which has high-resistivity characteristics. For example, the bulk substrate may have a resistivity greater than 500 Ohm*cm, such as around 1 kOhm*cm. In certain embodiments, one or more of the field-effect devices are surrounded by a low-resistivity implant configured to reduce effects of harmonic and other interference.

1 . (canceled) 
     
     
         2 . A semiconductor die comprising:
 a plurality of elements of a front-end module integrated on the semiconductor die, the plurality of elements including a power amplifier, a switch, and a plurality of filters;   a high-resistivity bulk silicon substrate;   a field-effect transistor configured as at least part of the power amplifier, and disposed on and extending above the high-resistivity bulk silicon substrate, the high-resistivity bulk silicon substrate including a low-resistivity well at least partially surrounding the field-effect transistor, the high-resistivity bulk silicon substrate further including a trench disposed adjacent to the low-resistivity well;   a complementary metal oxide semiconductor field-effect transistor device grown on the high-resistivity bulk silicon substrate; and   one or more capacitors disposed on a high-resistivity region adjacent to the low-resistivity well.   
     
     
         3 . The semiconductor die of  claim 2  wherein the field-effect transistor is a silicon-germanium transistor. 
     
     
         4 . The semiconductor die of  claim 2  wherein the field-effect transistor is part of a radio frequency switch circuit or a mixer circuit. 
     
     
         5 . The semiconductor die of  claim 2  wherein the high-resistivity bulk silicon substrate includes a low-resistivity epitaxial layer adjacent to a first portion of a top surface of the high-resistivity bulk silicon substrate and at least partially above the high-resistivity bulk silicon substrate. 
     
     
         6 . The semiconductor die of  claim 5  wherein the high-resistivity region is formed by at least partially destroying a region of the low-resistivity epitaxial layer on an opposite side of the trench from the field-effect transistor. 
     
     
         7 . The semiconductor die of  claim 5  wherein the high-resistivity region is formed by ion implantation of Argon in a region of the low-resistivity epitaxial layer on an opposite side of the trench from the field-effect transistor. 
     
     
         8 . The semiconductor die of  claim 2  wherein the field-effect transistor is a triple-well field-effect transistor. 
     
     
         9 . The semiconductor die of  claim 2  wherein one or more of the low-resistivity well or the trench electrically isolates the field-effect transistor from one or more neighboring devices on the high-resistivity bulk silicon substrate. 
     
     
         10 . The semiconductor die of  claim 9  wherein the one or more neighboring devices includes at least one of the complementary metal oxide semiconductor field-effect transistor device or the one or more capacitors. 
     
     
         11 . The semiconductor die of  claim 2  wherein the power amplifier is a dual band power amplifier that includes a low-band power amplifier and a high-band power amplifier. 
     
     
         12 . A front-end module comprising:
 a high-resistivity bulk silicon substrate;   a field-effect transistor configured as at least part of a power amplifier, and disposed on and extending above the high-resistivity bulk silicon substrate, the high-resistivity bulk silicon substrate including a low-resistivity well at least partially surrounding the field-effect transistor, the high-resistivity bulk silicon substrate further including a trench disposed adjacent to the low-resistivity well;   a complementary metal oxide semiconductor field-effect transistor device grown on the high-resistivity bulk silicon substrate; and   one or more capacitors disposed on a high-resistivity region adjacent to the low-resistivity well.   
     
     
         13 . The front-end module of  claim 12  wherein the field-effect transistor is a silicon-germanium transistor. 
     
     
         14 . The front-end module of  claim 12  wherein the high-resistivity bulk silicon substrate includes a low-resistivity epitaxial layer adjacent to a first portion of a top surface of the high-resistivity bulk silicon substrate and at least partially above the high-resistivity bulk silicon substrate. 
     
     
         15 . The front-end module of  claim 14  wherein the high-resistivity region is formed by at least partially destroying a region of the low-resistivity epitaxial layer on an opposite side of the trench from the field-effect transistor. 
     
     
         16 . The front-end module of  claim 14  wherein the high-resistivity region is formed by ion implantation of Argon in a region of the low-resistivity epitaxial layer on an opposite side of the trench from the field-effect transistor. 
     
     
         17 . The front-end module of  claim 12  wherein one or more of the low-resistivity well or the trench electrically isolates the field-effect transistor from one or more of the complementary metal oxide semiconductor field-effect transistor device or the one or more capacitors. 
     
     
         18 . A wireless device comprising:
 a front-end module including a high-resistivity bulk silicon substrate, a field-effect transistor configured as at least part of a power amplifier, a complementary metal oxide semiconductor field-effect transistor device grown on the high-resistivity bulk silicon substrate, and one or more capacitors disposed on a high-resistivity region adjacent to the low-resistivity well, the field-effect transistor disposed on and extending above the high-resistivity bulk silicon substrate, the high-resistivity bulk silicon substrate including a low-resistivity well at least partially surrounding the field-effect transistor, and the high-resistivity bulk silicon substrate further including a trench disposed adjacent to the low-resistivity well; and   an antenna in electrical connection with the front-end module, the antenna configured to receive and transmit wireless signals.   
     
     
         19 . The wireless device of  claim 18  wherein the field-effect transistor is a silicon-germanium triple-well transistor. 
     
     
         20 . The wireless device of  claim 18  wherein the high-resistivity bulk silicon substrate includes a low-resistivity epitaxial layer adjacent to a first portion of a top surface of the high-resistivity bulk silicon substrate and at least partially above the high-resistivity bulk silicon substrate. 
     
     
         21 . The wireless device of  claim 18  wherein one or more of the low-resistivity well or the trench electrically isolates the field-effect transistor from one or more of the complementary metal oxide semiconductor field-effect transistor device or the one or more capacitors.