Methods and Apparatuses for Use in Tuning Reactance in a Circuit Device

Abstract

Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.

1 . canceled 
     
     
         2 . A tunable inductor, comprising:
 a first RF terminal;   a plurality of second RF terminals;   a plurality of inductive elements connected each between the first RF terminal and a corresponding second RF terminal of the plurality of second RF terminals, wherein each inductive element is an inductor or a portion thereof; and   a plurality of switch arrangements coupled serially with corresponding plurality of inductive elements, wherein each switch arrangement of the plurality of switch arrangements is configured to receive a control signal, and wherein the control signal controls inductances applied between the first RF terminal and each of the second RF terminals of the plurality of second RF terminals by turning on or off switch arrangements in the plurality of switch arrangements;   
       wherein:
 at least one inductive element of the plurality of inductive elements is serially connected to at least two switch elements of a corresponding switch arrangement of the plurality of switch arrangements; and 
 the plurality of inductive elements and the plurality of switch arrangements are integrated on a same chip or die. 
 
     
     
         3 . The tunable inductor of  claim 2 , wherein the plurality of second RF terminals are all tied together. 
     
     
         4 . A system for tuning reactance to generate a second signal, the system comprising:
 the tunable inductor according to  claim 2 , wherein the tunable inductor is configured, during operation, to receive a first signal and generate the second signal; and   a controller configured, during operation, to provide a plurality of control signals to the tunable inductor, wherein the plurality of control signals is a function of the second signal to be generated.   
     
     
         5 . A method for tuning reactance of a circuital arrangement to generate a second signal, the method comprising:
 providing the tunable inductor according to  claim 2 ;   applying a first signal and a plurality of control signals to the tunable inductor, wherein reactance of the tunable inductor is a function of the plurality of control signals; and   generating the second signal based on the applying.   
     
     
         6 . The tunable inductor of  claim 2 , wherein switch elements of the at least two switch elements receive the same control signal. 
     
     
         7 . The tunable inductor of  claim 6 , wherein the switch elements of the at least two switch elements are serially interconnected. 
     
     
         8 . The tunable inductor of  claim 7 , wherein at least one switch element of the at least two switch elements is selected from a group consisting of a field effect transistor, an accumulated charge control field effect transistor, a microelectromechanical system (MEMS) switch, a diode, and a bipolar junction transistor. 
     
     
         9 . The tunable inductor of  claim 2 , wherein the chip is a silicon-on-insulator chip or a silicon-on-sapphire chip. 
     
     
         10 . The tunable inductor of  claim 2  used in a device selected from a group consisting of filters, resonant tank circuits, matching networks, and phase shifters. 
     
     
         11 . An electronic circuit including the tunable inductor of  claim 2  and a tunable capacitor. 
     
     
         12 . The tunable inductor of  claim 2 , further comprising a plurality of resistors connected with the plurality of switch arrangements. 
     
     
         13 . A circuital arrangement with a tunable impedance, the circuital arrangement comprising:
 a load impedance;   a plurality of switch arrangements connected in parallel or series with the load impedance, wherein each switch arrangement in the plurality of switch arrangements is configured, during operation, to receive a control signal, and   a plurality of individual reactances connected each serially with a corresponding switching arrangement of the plurality of switch arrangements, wherein at least one individual reactance is serially connected with at least two switch elements of a corresponding switch arrangement of the plurality of switch arrangements;   
       wherein:
 whether impedance of a particular individual reactance among the plurality of individual reactances contributes to impedance of the circuital arrangement is based on a control signal received, during operation, by a particular switch arrangement in the plurality of switch arrangements that is connected with the particular individual reactance, the control signal associated with the particular switch arrangement turns on or off the particular switch arrangement, and 
 the plurality of switch arrangements and the plurality of individual reactances are integrated on a same chip. 
 
     
     
         14 . The circuital arrangement of  claim 13 , wherein switch elements of the at least two switch elements receive the same control signal. 
     
     
         15 . The circuital arrangement of  claim 14 , wherein the switch elements of the at least two switch elements are serially interconnected. 
     
     
         16 . The circuital arrangement of  claim 13 , further comprising a plurality of resistors connected with the plurality of switch arrangements. 
     
     
         17 . The circuital arrangement of  claim 13 , wherein at least one switch element is selected from a group consisting of a field effect transistor, an accumulated charge control field effect transistor, a microelectromechanical system (MEMS) switch, a diode, and a bipolar junction transistor. 
     
     
         18 . The circuital arrangement of  claim 13 , wherein the load impedance and each individual reactance in the plurality of individual reactances is either a lumped element or a distributed element. 
     
     
         19 . The circuital arrangement of  claim 13 , wherein the chip is a silicon-on-insulator chip or a silicon-on-sapphire chip. 
     
     
         20 . A system for tuning impedance to generate a second signal, the system comprising:
 the circuital arrangement of  claim 13 , wherein the circuital arrangement is configured, during operation, to receive a first signal and generate the second signal; and   a controller configured, during operation, to provide a plurality of control signals to the circuital arrangement.   
     
     
         21 . The system of  claim 20 , wherein the plurality of switch arrangements comprises field effect transistor (FET) switch elements.