Solid-state image sensor, method for producing solid-state image sensor, and electronic device

Abstract

To provide a solid-state image sensor in which two or more semiconductor chips are bonded together without voids occurring in their bonding surfaces despite the conductive films bonded together at a high areal ratio. The solid-state image sensor includes at least a first semiconductor chip carrying thereon one or more than one of a first conductor and a pixel array, and a second semiconductor chip which bonds to the first semiconductor chip and carries thereon one or more than one of a second conductor and a logic circuit, with the first semiconductor chip and the second semiconductor chip bonding together in such a way that the first conductor and the second conductor overlap with each other and are electrically connected to each other, and the bonding occurring such that the first conductor and the second conductor differ from each other in the area of their bonding surfaces.

What is claimed is: 
     
         1 . A solid-state image sensor comprising at least:
 a first semiconductor chip carrying thereon one or more than one of a first conductor and a pixel array; and   a second semiconductor chip which bonds to the first semiconductor chip and carries thereon one or more than one of a second conductor and a logic circuit,   wherein the first semiconductor chip and the second semiconductor chip are bonded together in such a way that the first conductor and the second conductor overlap with each other and are electrically connected to each other, and   the bonding occurs such that the first conductor and the second conductor differ from each other in area of their bonding surfaces.   
     
     
         2 . The solid-state image sensor according to  claim 1 , wherein the bonding occurs such that the area of smaller bonding surface for the conductor accounts for equal to or more than 70% of the area of larger bonding surface for the conductor. 
     
     
         3 . The solid-state image sensor according to  claim 1 , wherein the bonding occurs such that the area of smaller bonding surface for the conductor accounts for equal to or more than 60% of the area of larger bonding surface for the conductor. 
     
     
         4 . The solid-state image sensor according to  claim 1 , wherein the region of the bonding surfaces in which the first conductor and the second conductor are formed is blocked by one of the first conductor and the second conductor. 
     
     
         5 . The solid-state image sensor according to  claim 1 , wherein the region of the bonding surfaces in which the first conductor and the second conductor are formed has apertures at some parts. 
     
     
         6 . The solid-state image sensor according to  claim 1 , wherein the first semiconductor chip has a wiring and a connecting hole formed therein to fix the potential of the first conductor and the second conductor. 
     
     
         7 . The solid-state image sensor according to  claim 1 , wherein the second semiconductor chip has a wiring and a connecting hole formed therein to fix the potential of the first conductor and the second conductor. 
     
     
         8 . The solid-state image sensor according to  claim 1 , wherein the first conductor and the second conductor are each arranged closer to the bonding surface than the logic circuit and a wiring which are formed on the first semiconductor chip and the second semiconductor chip. 
     
     
         9 . The solid-state image sensor according to  claim 1 , wherein the region in which the first conductor and the second conductor are formed is equal to or larger than the region in which the pixel array is formed. 
     
     
         10 . The solid-state image sensor according to  claim 1 , wherein the first conductor and the second conductor are formed in plural number such that they are aslant to the direction of a signal line of an analog circuit which is formed in the first semiconductor chip and the second semiconductor chip. 
     
     
         11 . A method for producing a solid-state image sensor, the method comprising:
 a step of preparing a first semiconductor chip which has a first conductor and a pixel array formed thereon in singular or plural number;   a step of preparing a second semiconductor chip which has a second conductor and a logic circuit formed thereon in singular or plural number; and   a step of placing the first conductor formed on the first semiconductor chip and the second conductor formed on the second semiconductor chip one over the other for electrical connection,   wherein the first semiconductor chip and the second semiconductor chip are bonded to each other in such a way that the first conductor and the second conductor differ from each other in area of their bonding surfaces.   
     
     
         12 . An electronic device comprising:
 a solid-state image sensor including at least
 a first semiconductor chip carrying thereon one or more than one of a first conductor and a pixel array, and 
 a second semiconductor chip which bonds to the first semiconductor chip and carries thereon one or more than one of a second conductor and a logic circuit; 
   the first semiconductor chip and the second semiconductor chip being bonded together in such a way that the first conductor and the second conductor overlap with each other and are electrically connected to each other;   the bonding occurring such that the first conductor and the second conductor differ from each other in area of their bonding surfaces.