Manufacturing method of thin-film transistor

Abstract

The invention relates to a thin-film transistor and a manufacturing method thereof. The manufacturing method of the thin-film transistor includes the following steps: an insulating layer is formed to cover a gate on a substrate; a semiconductor pattern having a first region and a second region is formed on the insulating layer; a plurality of island patterns is formed, wherein at least a portion of the plurality of island patterns is disposed on the semiconductor pattern, and the plurality of island patterns is separated from one another by a gap; and a source and a drain are formed to cover a portion of the plurality of island patterns and fill the gaps to respectively be electrically connected to the first region and the second region of the semiconductor pattern.

What is claimed is: 
     
         1 . A manufacturing method of a thin-film transistor, comprising:
 forming a gate on a substrate;   forming an insulating layer to cover the gate;   forming a semiconductor pattern on the insulating layer, wherein the semiconductor pattern has a first region and a second region opposite to each other;   forming a plurality of island patterns, wherein at least a portion of the plurality of island patterns is disposed on the semiconductor pattern, and the plurality of island patterns are separated from each other by gaps; and   forming a source and a drain to cover a portion of the plurality of island patterns and fill the gaps such that the source and the drain are respectively electrically connected to the first region and the second region of the semiconductor pattern.   
     
     
         2 . The manufacturing method of the thin-film transistor of  claim 1 , wherein a method of forming the plurality of island patterns comprises a half-deposition method. 
     
     
         3 . The manufacturing method of the thin-film transistor of  claim 2 , wherein a rate of forming a height of each of the island patterns is greater than 0 Å/sec and less than or equal to 10 Å/sec. 
     
     
         4 . The manufacturing method of the thin-film transistor of  claim 2 , wherein a method of forming the plurality of island patterns comprises a plasma-enhanced chemical vapor deposition method, gases used in the plasma-enhanced chemical vapor deposition method comprise silane and nitrogen oxide, and process parameters of the plasma-enhanced chemical vapor deposition method comprise a silane flow rate between 80 sccm and 1600 sccm, a nitrogen oxide flow rate between 5000 sccm and 65000 sccm, a radio frequency power between 80 W and 2300 W, a pressure between 0.4 mbar and 0.6 mbar or between 750 mTorr and 1450 mTorr, and a temperature between 220 Celsius and 350 Celsius. 
     
     
         5 . The manufacturing method of the thin-film transistor of  claim 1 , wherein the plurality of island patterns are randomly distributed on the first region and the second region of the semiconductor pattern. 
     
     
         6 . The manufacturing method of the thin-film transistor of  claim 1 , wherein sizes of the plurality of island patterns are not consistent. 
     
     
         7 . The manufacturing method of the thin-film transistor of  claim 1 , wherein a method of forming the plurality of island patterns comprises a chemical vapor deposition method, and the chemical vapor deposition method comprises:
 disposing a shielding plate between the semiconductor pattern and a gas source, wherein the shielding plate has a plurality of holes, and a gas from the gas source passes through the plurality of holes of the shielding plate and forms a plurality of island patterns corresponding to the plurality of holes on the semiconductor pattern.   
     
     
         8 . The manufacturing method of the thin-film transistor of  claim 1 , wherein the semiconductor pattern further has a third region connected between the first region and the second region, and the plurality of island patterns is further formed on the third region of the semiconductor pattern and a portion of the insulating layer exposed by the semiconductor pattern. 
     
     
         9 . The manufacturing method of the thin-film transistor of  claim 8 , wherein a method of forming the source and the drain comprises:
 forming a conductive layer to cover the plurality of island patterns, the first region, the second region, and the third region of the semiconductor pattern, and the portion of the insulating layer exposed by the semiconductor pattern; and   patterning the conductive layer using a wet etching process to form the source and the drain respectively covering the first region and second region and exposing the third region of the semiconductor pattern, wherein another portion of the plurality of island patterns located on the third region of the semiconductor pattern and the portion of the insulating layer is kept when the source and the drain are formed.   
     
     
         10 . The manufacturing method of the thin-film transistor of  claim 8 , wherein a method of forming the source and the drain comprises:
 forming a conductive layer to cover the plurality of island patterns, the first region, the second region, and the third region of the semiconductor pattern, and the portion of the insulating layer exposed by the semiconductor pattern; and   patterning the conductive layer using a dry etching process to form the source and the drain respectively covering the first region and the second region and exposing the third region of the semiconductor pattern, wherein another portion of the plurality of island patterns located on the third region of the semiconductor pattern and the portion of the insulating layer exposed by the semiconductor pattern, the source, and the drain is removed when the source and the drain are formed.   
     
     
         11 . The manufacturing method of the thin-film transistor of  claim 1 , wherein the other portion of the plurality of island patterns is disposed at two sides of the semiconductor pattern and located on the insulating layer, and the source and the drain further cover the other portion of the plurality of island patterns. 
     
     
         12 . The manufacturing method of the thin-film transistor of  claim 1 , wherein a material of the semiconductor pattern comprises a metal-oxide-semiconductor.