US2019109061A1PendingUtilityA1

Edge Bend for Isolation Packages

Assignee: TEXAS INSTRUMENTS INCPriority: Oct 11, 2017Filed: Jul 5, 2018Published: Apr 11, 2019
Est. expiryOct 11, 2037(~11.2 yrs left)· nominal 20-yr term from priority
H10W 90/756H10W 90/753H10W 72/5449H10W 72/932H10W 90/811H10W 74/111H10W 70/429H10W 70/427H10W 70/411H10W 74/129H01L 23/49575H01L 23/3114H01L 23/49503
49
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

In one instance, a semiconductor isolation package includes a leadframe that includes a plurality of leadframe leads. At least one of the plurality of leadframe leads includes a lead body having a first end that comprises an external pin portion and a second end. The lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion. The edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion. The first bend is in the direction of the first end on the leg portion. The edge bend assists in shielding electronic fields. Other aspects are presented.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor isolation package comprising a leadframe, the lead frame comprising:
 a plurality of leadframe leads, wherein at least one of the plurality of leadframe leads comprises:
 a lead body having a first end that comprises an external pin portion and a second end, 
 wherein the lead body has a leg portion coupled to a central lead portion that is coupled to an edge bend portion, 
 wherein the edge bend portion is formed by a first bend on the lead body proximate the second end between the central lead portion and edge bend portion, and 
 wherein the first bend is in the direction of the first end on the leg portion. 
   
     
     
         2 . The semiconductor isolation package of  claim 1 , wherein the first bend comprises an angle that is between 20 and 60 degrees. 
     
     
         3 . The semiconductor isolation package of  claim 1 , wherein the first bend comprises an angle that is between 30 and 55 degrees. 
     
     
         4 . The semiconductor isolation package of  claim 1 , wherein the first bend comprises an angle that is between 40 and 50 degrees. 
     
     
         5 . The semiconductor isolation package of  claim 1 , wherein the first bend is formed at least 35 micrometers from the second end. 
     
     
         6 . The semiconductor isolation package of  claim 1 , wherein a second bend is formed between the leg portion and central portion. 
     
     
         7 . The semiconductor isolation package of  claim 1 , wherein the first bend comprises an angle that is between 30 and 50 degrees, wherein the first bend is formed at least 35 micrometers from the second end, and wherein a second bend is formed between the leg portion and central portion. 
     
     
         8 . An isolation semiconductor package comprising:
 a leadframe comprising:
 a plurality of leadframe leads comprising a first end and a second end, the first end comprises an external pin portion, 
 wherein at least one of the leadframe leads of the plurality of leadframe leads comprises a lead body having a leg portion coupled to a central lead portion coupled to edge bend portion, 
 wherein a first bend is formed between the central lead portion and the edge bend portion and the first bend is formed in the direction of the first end, 
 a first die pad, which is a downset die pad, coupled to at least one of the plurality of leadframe leads, and 
 wherein the central lead portion of the at least one of the leadframe leads of the plurality of leadframe leads extends along a first plane in a first direction and wherein the first die pad is at least partially in a second plane that is parallel to the first plane, and wherein the first plane is displaced from the second plane in a second direction that is orthogonal to the first direction and is displaced towards the first end of the plurality of leadframe leads; 
   a component coupled to the first die pad;   a mold compound substantially covering the first die pad, the component, and at least the edge bend portion of the at least one of the leadframe leads of the plurality of leads.   
     
     
         9 . The isolation semiconductor package of  claim 8 , wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads. 
     
     
         10 . The isolation semiconductor package of  claim 8 , wherein the component comprises a transformer having a laminate, and wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads. 
     
     
         11 . The isolation semiconductor package of  claim 8 , wherein the first bend is formed at least 35 micrometers from the second end. 
     
     
         12 . The isolation semiconductor package of  claim 8 , wherein the edge bend portion forms an angle between a reference line and the edge bend portion; wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; wherein the angle is between 30 and 50 degrees; and wherein the first bend is formed at least 35 micrometers from the second end. 
     
     
         13 . The isolation semiconductor package of  claim 12 , wherein the angle is between 40 and 50 degrees. 
     
     
         14 . The isolation semiconductor package of  claim 12 , wherein the angle is 45 degrees. 
     
     
         15 . The isolation semiconductor package of  claim 8 , wherein the first die pad has an external edge closest to the second end of the plurality of leadframe leads that is formed with a stepped portion. 
     
     
         16 . The isolation semiconductor package of  claim 15 , wherein a thickness of the external edge forming the stepped portion is 70% or less of a thickness of other portions of the first die pad. 
     
     
         17 . The isolation semiconductor package of  claim 8 , wherein the second plane is displaced from the first plane by at least 75 micrometers. 
     
     
         18 . The isolation semiconductor package of  claim 8 , wherein the component comprises a transformer having a laminate; wherein first die pad is within 600 micrometers of the second end of the plurality of leadframe leads; wherein the second plane is displaced from the first plane by at least 75 micrometers; wherein the edge bend portion forms an angle between a reference line and the edge bend portion and wherein the reference line extends from the second end of the at least one of the leadframe leads of the plurality of leadframes when positioned without a bend to a closest point of the first die pad; and wherein the angle is between 30 and 50 degrees. 
     
     
         19 . A semiconductor isolation package comprising a leadframe, the leadframe comprising:
 a plurality of leadframe leads comprising a first end that comprises an external pin portion and a second end;   wherein each of the plurality of leadframe leads comprises a lead body having a leg portion proximate the first end and coupled to a central lead portion that is coupled to an end portion at the second end;   wherein at least some of the plurality leadframe leads comprise a first internal edge on the second end and at least some of the plurality of leadframe leads comprise a second internal edge on the second end and that is opposed to the first internal edge;   a downset die pad positioned between the first internal edge and the second internal edge and, wherein the downset die pad is displaced from the second end of the plurality of leadframe leads in a direction towards the first end of the plurality leadframe leads;   wherein at least one of the plurality of leadframe leads is formed with a bend between the central lead portion and the end portion to form an edge bend, wherein the bend is in a same direction as the second plane is displaced from the first plane.   
     
     
         20 . The semiconductor package of  claim 19 , wherein the bend formed between the central lead portion and end portion is between 20 and 60 degrees. 
     
     
         21 . The semiconductor package of  claim 19 , wherein the bend is formed at least 35 micrometers from the second end. 
     
     
         22 . The semiconductor package of  claim 19 , wherein the downset die is positioned closer to the first internal edge than to the second internal edge.

Join the waitlist — get patent alerts

Track US2019109061A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.