US2019097057A1PendingUtilityA1

Non-linear fin-based devices

Assignee: INTEL CORPPriority: Jun 27, 2014Filed: Nov 29, 2018Published: Mar 28, 2019
Est. expiryJun 27, 2034(~7.9 yrs left)· nominal 20-yr term from priority
H03D 7/165H03D 7/1425H03D 7/1466H03D 7/1458H03D 7/1441H01L 29/7853H01L 21/823412H01L 29/41791H10D 84/0158H10D 84/834H10D 30/6219H10D 86/215H10D 86/011H10D 84/0128H10D 84/038H10D 62/235H10D 62/151H10D 62/117H10D 30/6212
55
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Claims

Abstract

An embodiment includes an apparatus comprising: a non-planar fin having first, second, and third portions each having major and minor axes and each being monolithic with each other; wherein (a) the major axes of the first, second, and third portions are parallel with each other, (b) the major axes of the first and second portions are non-collinear with each other, (c) each of the first, second, and third portions include a node of a transistor selected from the group comprising source, drain, and channel, (e) the first, second, and third portions comprise at least one finFET. Other embodiments are described herein.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An apparatus comprising:
 a non-planar fin having first, second, and third portions each having major and minor axes and each being monolithic with each other;   wherein (a) the major axes of the first, second, and third portions are parallel with each other, (b) the major axes of the first and second portions are non-collinear with each other, (c) the first portion includes a node of a transistor selected from the group comprising source, drain, or channel, (d) the second portion includes a node of a transistor selected from the group comprising source, drain, or channel, (e) the third portion includes a node of a transistor selected from the group comprising source, drain, or channel, and (f) the first, second, and third portions are included in at least one finFET.   
     
     
         2 . The apparatus of  claim 1  comprising a radio-frequency (RF) mixer that includes the first, second, and third portions. 
     
     
         3 . The apparatus of  claim 2 , wherein the fin includes:
 an input node for a first signal;   an input node for an oscillator signal; and   an output node for a mixed signal that is based on the first signal and the oscillator signal.   
     
     
         4 . The apparatus of  claim 3 , wherein the first portion includes:
 the input node for the first signal; and   the input node for the oscillator signal.   
     
     
         5 . The apparatus of  claim 4 , wherein the second portion includes:
 an input node for a second signal; and   an input node for an additional oscillator signal.   
     
     
         6 . The apparatus of  claim 3  wherein (a) the fin includes fourth and fifth portions each having major and minor axes and each being monolithic with the third portion, (b) the major axes of the third, fourth, and fifth portions are parallel with each other, (c) the major axes of the third and fourth portions are non-collinear with each other, and (d) the third portion includes an additional input node. 
     
     
         7 . The apparatus of  claim 6  wherein the third portion is included in an amplifier. 
     
     
         8 . The apparatus of  claim 1  comprising a multiplexor (mux), the mux including the first, second, and third portions. 
     
     
         9 . The apparatus of  claim 8 , wherein (a) the first portion includes an input node for a first signal, (b) the second portion includes an input node for a second signal, (c) the third portion includes an output node for one of the first or second signals, (d) the first portion includes a selection node, and (e) the second portion includes a selection node. 
     
     
         10 . The apparatus of  claim 9  wherein:
 the selection node for the first portion couples to a single selection signal source; and 
 the selection node for the second portion couples to the single selection signal source. 
 
     
     
         11 . The apparatus of  claim 9 , wherein (a) the fin includes fourth and fifth portions each having major and minor axes and each being monolithic with the third portion, (b) the major axes of the third, fourth, and fifth portions are parallel with each other, (c) the major axes of the third and fourth portions are non-collinear with each other, (d) the third portion includes a selection node. 
     
     
         12 . An apparatus comprising:
 a non-planar fin having first, second, and third portions each having major and minor axes and each being monolithic with each other;   wherein (a) the major axes of the first, second, and third portions are parallel with each other, (b) the major axes of the first and second portions are non-collinear with each other, (c) the first portion includes a node of a transistor selected from the group comprising source, drain, or channel, (d) the second portion includes a node of a transistor selected from the group comprising source, drain, or channel, (e) the third portion includes a node of a transistor selected from the group comprising source, drain, or channel, and (f) the first, second, and third portions are included in at least one finFET;   wherein (a) each of the first, second, and third portions have a maximum width corresponding to its minor axis, and (b) the maximum width of the first portion is unequal to at least one of the maximum widths of the second or third portions.   
     
     
         13 . The apparatus of  claim 12 , wherein:
 the first portion includes a finFET having source, drain, and channel nodes;   the second portion includes a finFET having source, drain, and channel nodes;   the third portion includes a finFET having source, drain, and channel nodes; and   the fin is included in at least three finFETs.   
     
     
         14 . The apparatus of  claim 12 , wherein:
 the first portion includes a node of a single finFET;   the second portion includes a node of the single finFET;   the third portion includes a node of the single finFET; and   the first, second, and third portions intersect with each other at a common portion that includes a channel for the single finFET.   
     
     
         15 . The apparatus of  claim 12  wherein (a) the fin includes a fourth portion having major and minor axes and being monolithic with the first, second, and third portions, (b) the major axes of the first, second, third, and fourth portions are parallel with each other, (c) the major axis of the fourth portion is non-collinear with at least one of the major axes of the first, second, or third portions. 
     
     
         16 . The apparatus of  claim 12 , wherein the major axes of the first, second, and third portions are all non-collinear with each other. 
     
     
         17 . An apparatus comprising:
 a non-planar fin having first, second, and third portions each having major and minor axes and each being monolithic with each other;   wherein (a) the major axes of the first, second, and third portions are parallel with each other, (b) the major axes of the first and second portions are non-collinear with each other, (c) the first portion includes a node of a transistor selected from the group comprising source, drain, or channel, (d) the second portion includes a node of a transistor selected from the group comprising source, drain, or channel, (e) the third portion includes a node of a transistor selected from the group comprising source, drain, or channel, and (f) the first, second, and third portions are included in at least one finFET;   wherein the first portion includes a channel coupled to a single common gate contact;   wherein the second portion includes a channel coupled to the single common gate contact;   wherein the channels of the first and second portions do not directly contact each other.   
     
     
         18 . The apparatus of  claim 17 , wherein:
 the first portion includes a finFET having source, drain, and channel nodes;   the second portion includes a finFET having source, drain, and channel nodes;   the third portion includes a finFET having source, drain, and channel nodes; and   the fin is included in at least three finFETs.   
     
     
         19 . The apparatus of  claim 17 , wherein:
 the first portion includes a source coupled to a single common source contact;   the second portion includes a source coupled to the single common source contact; and   the sources for the first and second portions do not directly contact each other.   
     
     
         20 . The apparatus of  claim 1 , wherein the major axes of the first, second, and third portions are all non-collinear with each other.

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