Method and apparatus to measure self-capacitance using a single pin

Abstract

A method for measuring capacitance in a sensor device using an internal reference circuit element(s), and without implementing additional circuitry and devices external to the sensor device, is described. In some embodiments a method uses an output pin of the sensor device and an internal reference capacitor of the sensor device to identify a touch applied to a touch point or electrode coupled to the touch sensor. The method applies reference voltages to charge the reference capacitor and measure a signal received from an electrode, wherein the touch sensor controls switching within the touch sensor to apply the reference voltages to the reference capacitor.

1 .- 4 . (canceled) 
     
     
         5 .- 20 . (canceled) 
     
     
         21 . A non-transitory computer-readable medium comprising instructions which, when implemented by one or more machines, cause the one or more machines to:
 discharge, during a first burst cycle, a sampling capacitor and an electrode capacitor by closing a first switch of a device, opening a second switch of the device, and closing a third switch of the device, wherein:
 the first switch is connected to a first ground when closed; 
 the second switch is connected to a reference voltage when closed; and 
 the third switch is connected to a second ground when closed; 
   float, during the first burst cycle, the sampling capacitor by opening the first switch and the third switch while the second switch remains open;   transfer, during the first burst cycle, charge to the sampling capacitor and the electrode capacitor by closing the second switch while the first switch and the third switch remain open;   float, during the first burst cycle, the sampling capacitor by opening the second switch while the first switch and the second switch remain open; and   discharge, during the first burst cycle, the electrode capacitor by closing the first switch while the second switch and the third switch remain open, wherein discharging the electrode capacitor completes the first burst cycle.   
     
     
         22 . The non-transitory computer-readable medium of  claim 21 , wherein the instructions further cause the one or more machines to measure a capacitance of the electrode capacitor using a capacitance of the sampling capacitor. 
     
     
         23 . The non-transitory computer-readable medium of  claim 21 , wherein the instructions further cause the one or more machines to:
 float, during a second burst cycle, the sampling capacitor by opening the first switch;   transfer, during the second burst cycle, a second charge to the sampling capacitor and the electrode capacitor by closing the second switch;   float, during the second burst cycle, the sampling capacitor by opening the second switch; and   discharge, during the second burst cycle, the electrode capacitor by closing the first switch, wherein discharging the electrode capacitor during the second burst cycle completes the second burst cycle.   
     
     
         24 . The non-transitory computer-readable medium of  claim 21 , wherein:
 the sampling capacitor is positioned between two outlet ports of the device; and   a voltage across the sampling capacitor increases during each subsequent burst cycle.   
     
     
         25 . The non-transitory computer-readable medium of  claim 21 , the instructions further causing the one or more machines to measure a voltage across the sampling capacitor based on the following equation:
     V ( C   s )=( C   x   *V   dd )/( C   s   +C   x );   wherein:
 V(C s ) is the voltage across the sampling capacitor; 
 C x  is a capacitance at the electrode capacitor; 
 V dd  is the reference voltage; and 
 C s  is a capacitance at the sampling capacitor. 
   
     
     
         26 . The non-transitory computer-readable medium of  claim 21 , wherein discharging the sampling capacitor and the electrode capacitor comprises discharging any residual charge stored on the sampling capacitor and the electrode capacitor. 
     
     
         27 . The non-transitory computer-readable medium of  claim 21 , wherein transferring charge to the sampling capacitor and the electrode capacitor comprises transferring a same amount of charge to the sampling capacitor and the electrode capacitor. 
     
     
         28 . A method, comprising:
 discharging, during a first burst cycle, a sampling capacitor and an electrode capacitor by closing a first switch of a device, opening a second switch of the device, and closing a third switch of the device, wherein:
 the first switch is connected to a first ground when closed; 
 the second switch is connected to a reference voltage when closed; and 
 the third switch is connected to a second ground when closed; 
   floating, during the first burst cycle, the sampling capacitor by opening the first switch and the third switch while the second switch remains open;   transferring, during the first burst cycle, charge to the sampling capacitor and the electrode capacitor by closing the second switch while the first switch and the third switch remain open;   floating, during the first burst cycle, the sampling capacitor by opening the second switch while the first switch and the second switch remain open; and   discharging, during the first burst cycle, the electrode capacitor by closing the first switch while the second switch and the third switch remain open, wherein discharging the electrode capacitor completes the first burst cycle.   
     
     
         29 . The method of  claim 28 , further comprising measuring a capacitance of the electrode capacitor using a capacitance of the sampling capacitor. 
     
     
         30 . The method of  claim 28 , further comprising:
 floating, during a second burst cycle, the sampling capacitor by opening the first switch;   transferring, during the second burst cycle, a second charge to the sampling capacitor and the electrode capacitor by closing the second switch;   floating, during the second burst cycle, the sampling capacitor by opening the second switch; and   discharging, during the second burst cycle, the electrode capacitor by closing the first switch, wherein discharging the electrode capacitor during the second burst cycle completes the second burst cycle.   
     
     
         31 . The method of  claim 28 , wherein:
 the sampling capacitor is positioned between two outlet ports of the device; and   a voltage across the sampling capacitor increases during each subsequent burst cycle.   
     
     
         32 . The method of  claim 28 , the method further comprising measuring a voltage across the sampling capacitor based on the following equation:
     V ( C   s )=( C   x   *V   dd )/( C   s   +C   x );   wherein:
 V(C s ) is the voltage across the sampling capacitor; 
 C x  is a capacitance at the electrode capacitor; 
 V dd  is the reference voltage; and 
 C s  is a capacitance at the sampling capacitor. 
   
     
     
         33 . The method of  claim 28 , wherein discharging the sampling capacitor and the electrode capacitor comprises discharging any residual charge stored on the sampling capacitor and the electrode capacitor. 
     
     
         34 . The method of  claim 28 , wherein transferring charge to the sampling capacitor and the electrode capacitor comprises transferring a same amount of charge to the sampling capacitor and the electrode capacitor. 
     
     
         35 . An apparatus, comprising:
 one or more processors; and   one or more memory units coupled to the one or more processors, the one or more memory units collectively storing logic configured to, when executed by the one or more processors, cause the one or more processors to perform operations comprising:
 discharging, during a first burst cycle, a sampling capacitor and an electrode capacitor by closing a first switch of a device, opening a second switch of the device, and closing a third switch of the device, wherein:
 the first switch is connected to a first ground when closed; 
 the second switch is connected to a reference voltage when closed; and 
 the third switch is connected to a second ground when closed; 
 
 floating, during the first burst cycle, the sampling capacitor by opening the first switch and the third switch while the second switch remains open; 
 transferring, during the first burst cycle, charge to the sampling capacitor and the electrode capacitor by closing the second switch while the first switch and the third switch remain open; 
 floating, during the first burst cycle, the sampling capacitor by opening the second switch while the first switch and the second switch remain open; and 
 discharging, during the first burst cycle, the electrode capacitor by closing the first switch while the second switch and the third switch remain open, wherein discharging the electrode capacitor completes the first burst cycle. 
   
     
     
         36 . The apparatus of  claim 35 , the operations further comprising measuring a capacitance of the electrode capacitor using a capacitance of the sampling capacitor. 
     
     
         37 . The apparatus of  claim 35 , the operations further comprising:
 floating, during a second burst cycle, the sampling capacitor by opening the first switch;   transferring, during the second burst cycle, a second charge to the sampling capacitor and the electrode capacitor by closing the second switch;   floating, during the second burst cycle, the sampling capacitor by opening the second switch; and   discharging, during the second burst cycle, the electrode capacitor by closing the first switch, wherein discharging the electrode capacitor during the second burst cycle completes the second burst cycle.   
     
     
         38 . The apparatus of  claim 35 , wherein:
 the sampling capacitor is positioned between two outlet ports of the device; and   a voltage across the sampling capacitor increases during each subsequent burst cycle.   
     
     
         39 . The apparatus of  claim 35 , the operations further comprising measuring a voltage across the sampling capacitor based on the following equation:
     V ( C   s )=( C   x   *V   dd )/( C   s   +C   x );   wherein:
 V(C s ) is the voltage across the sampling capacitor; 
 C x  is a capacitance at the electrode capacitor; 
 V dd  is the reference voltage; and 
 C s  is a capacitance at the sampling capacitor. 
   
     
     
         40 . The apparatus of  claim 35 , wherein discharging the sampling capacitor and the electrode capacitor comprises discharging any residual charge stored on the sampling capacitor and the electrode capacitor.