Manufacturing method of pixel structure

Abstract

A method for manufacturing a pixel structure is provided. A patterned semiconductor material layer, an insulation material layer, and a gate electrode material layer are formed in sequence on a substrate to form a stacked structure. A patterned photoresist layer is formed on the stacked structure by using a photomask. A portion of the stacked structure is removed to pattern the patterned semiconductor material layer into a patterned semiconductor layer by using the patterned photoresist layer as a mask. Another portion of the stacked structure is etched by using a portion of the patterned photoresist layer as a mask until a portion of the semiconductor layer in the stacked structure is exposed. Then, an exposed portion of the semiconductor layer is modified to increase a conductivity of the exposed portion of the semiconductor layer. Finally, the patterned photoresist layer is removed. A pixel structure manufactured by the method is provided.

What is claimed is: 
     
         1 . A manufacturing method of a pixel structure, the method comprising:
 forming a patterned semiconductor material layer, an insulation material layer, and a gate electrode material layer in sequence on a substrate to form a stacked structure;   forming a patterned photoresist layer on the stacked structure by using a photomask, wherein the patterned photoresist layer comprises a first thickness portion covering a first portion of the stacked structure and a second thickness portion covering a second portion of the stacked structure, and the patterned photoresist layer exposes a third portion of the stacked structure;   removing the third portion of the stacked structure to pattern the patterned semiconductor material layer into a patterned semiconductor layer by using the patterned photoresist layer as a mask;   removing the first thickness portion of the patterned photoresist layer and thinning the second thickness portion of the patterned photoresist layer to expose the first portion of the stacked structure previously covered by the first thickness portion of the patterned photoresist layer;   etching the first portion of the stacked structure by using the thinned second thickness portion of the patterned photoresist layer as a mask until an exposed portion of the patterned semiconductor layer in the first portion of the stacked structure is exposed, wherein the gate electrode material layer is patterned into a gate electrode layer, and the insulation material layer is patterned into an insulation layer having a shape substantially conformal to the gate electrode layer and covering a covered portion of the patterned semiconductor layer;   modifying the exposed portion of the patterned semiconductor layer to increase a conductivity of the exposed portion of the patterned semiconductor layer; and   removing the thinned second thickness portion of the patterned photoresist layer, wherein the covered portion of the patterned semiconductor layer comprises a channel, the exposed portion of the patterned semiconductor layer comprises a source and a drain, the gate electrode layer comprises a gate above the channel, and the gate, the channel, the source and the drain form a thin film transistor structure.   
     
     
         2 . The method as claimed in  claim 1 , further comprising forming a patterned metal layer on the substrate prior to forming the stacked structure, wherein the patterned metal layer comprises a data line electrically connected to the source. 
     
     
         3 . The method as claimed in  claim 2 , wherein the patterned semiconductor material layer has an opening exposing a portion of the data line and the patterned semiconductor layer patterned from the patterned semiconductor material layer comprises a semiconductor portion and has a separating gap corresponding to the opening, such that the insulation layer patterned from the insulation material layer comprises an insulation portion filling the separating gap and contacting the portion of the data line and the semiconductor portion is electrically insulating to the data line. 
     
     
         4 . The method as claimed in  claim 1 , wherein the removing the first thickness portion of the patterned photoresist layer and the thinning the second thickness portion of the patterned photoresist layer comprises performing an ashing process. 
     
     
         5 . The method as claimed in  claim 1 , wherein the forming the patterned photoresist layer on the stacked structure comprises using one half-tone photomask or one gray-tone photomask to form the first thickness portion and the second thickness portion. 
     
     
         6 . The method as claimed in  claim 1 , wherein the modifying the exposed portion of the patterned semiconductor layer comprises performing a plasma treatment, an ion implanting, or a combination thereof. 
     
     
         7 . The method as claimed in  claim 6 , wherein the plasma treatment uses hydrogen gas as a processing gas. 
     
     
         8 . The method as claimed in  claim 1 , wherein the removing the second thickness portion comprises performing a stripping process. 
     
     
         9 . The method as claimed in  claim 1 , further comprising forming a pixel electrode electrically connected to the drain. 
     
     
         10 . The method as claimed in  claim 9 , wherein the formation of the pixel electrode is simultaneous to the formation of the source and the drain. 
     
     
         11 . The method as claimed in  claim 9 , wherein the pixel electrode is formed by modifying the exposed portion of the patterned semiconductor layer.