Semiconductor device having laterally offset stacked semiconductor dies

Abstract

Semiconductor devices including stacked semiconductor dies and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die coupled to a package substrate and a second semiconductor die stacked over the first semiconductor die and laterally offset from the first semiconductor die. The second semiconductor die can accordingly include an overhang portion that extends beyond a side of the first semiconductor die and faces the package substrate. In some embodiments, the second semiconductor die includes bond pads at the overhang portion that are electrically coupled to the package substrate via conductive features disposed therebetween. In certain embodiments, the first semiconductor die can include second bond pads electrically coupled to the package substrate via wire bonds.

1 . A semiconductor device, comprising:
 a package substrate;   a first semiconductor die coupled to the package substrate and having an upper surface facing away from the package substrate, the upper surface including first bond pads;   wire bonds electrically coupling the first bond pads of the first semiconductor die to the package substrate;   a second semiconductor die attached to the upper surface of the first semiconductor die via an adhesive die-attach material, wherein the second semiconductor die has a lower surface facing the package substrate, wherein the second semiconductor die extends laterally beyond at least one side of the first semiconductor die to define an overhang portion of the second semiconductor die, and wherein the lower surface includes second bond pads at the overhang portion; and   conductive features electrically coupling the second bond pads of the second semiconductor die to the package substrate.   
     
     
         2 . The semiconductor device of  claim 1 , further comprising:
 a molded material over the package substrate and at least partially around the first semiconductor die, the wire bonds, the second semiconductor die, and/or the conductive features, wherein the second semiconductor die includes an upper surface opposite the lower surface, and wherein the molded material does not extend away from the package substrate beyond a plane coplanar with the upper surface of the second semiconductor die.   
     
     
         3 . The semiconductor device of  claim 2  wherein the molded material encapsulates the first semiconductor die, the wire bonds, and the conductive features. 
     
     
         4 . The semiconductor device of  claim 1  wherein the conductive features are conductive pillars extending between the second bond pads and the package substrate. 
     
     
         5 . The semiconductor device of  claim 1  wherein the package substrate is a redistribution structure having a first surface and a second surface opposite the first surface, wherein the first surface includes first conductive contacts and second conductive contacts, wherein the second surface includes third conductive contacts, wherein the first conductive contacts and second conductive contacts are electrically coupled to corresponding ones of the third conductive contacts by conductive lines extending through and/or on an insulating material, and wherein the redistribution structure does not include a pre-formed substrate. 
     
     
         6 . The semiconductor device of  claim 5  wherein the wirebonds electrically couple the first bond pads of the first semiconductor die to corresponding ones of the first conductive contacts of the redistribution structure, and wherein the conductive features are copper pillars formed on the second conductive contacts and electrically coupling the second bond pads of the second semiconductor die to corresponding ones of the second conductive contacts. 
     
     
         7 . The semiconductor device of  claim 1  wherein a maximum height of the wire bonds above the upper surface of the first semiconductor die is less than or equal to a height of the second semiconductor die above the upper surface of the first semiconductor die. 
     
     
         8 . The semiconductor device of  claim 1  wherein the upper surface of the first semiconductor die includes a first portion and a second portion, wherein the second semiconductor die is over the first semiconductor die only at the second portion, and wherein the first bond pads are located at the first portion. 
     
     
         9 . The semiconductor device of  claim 1  wherein the first semiconductor die includes opposing first sides and opposing second sides, and wherein the second semiconductor die extends laterally beyond only one of the first sides or one of the second sides. 
     
     
         10 . The semiconductor device of  claim 1  wherein the first semiconductor die includes opposing first sides and opposing second sides, and wherein the second semiconductor die extends laterally beyond one of the first sides and one of the second sides. 
     
     
         11 . The semiconductor device of  claim 1  wherein the first semiconductor die and the second semiconductor die have the same shape and dimensions. 
     
     
         12 . The semiconductor device of  claim 1  wherein the die-attach material is a first die-attach material, further comprising:
 a second die-attach material between the first semiconductor die and the package substrate. 
 
     
     
         13 . The semiconductor device of  claim 1  wherein the wire bonds are first wire bonds, wherein the conductive features are first conductive features, and further comprising:
 a third semiconductor die coupled to an upper surface of the second semiconductor die and having an upper surface facing away from the second semiconductor die and the package substrate, the upper surface of the third semiconductor die including third bond pads; and 
 second wire bonds electrically coupling the third bond pads of the third semiconductor die to the package substrate. 
 
     
     
         14 . The semiconductor device of  claim 13  further comprising a die-attach material on the upper surface of the second semiconductor die, wherein the third semiconductor die is coupled to the second semiconductor die via the die-attach material on the upper surface of the second semiconductor die, and wherein the third semiconductor die is over substantially all of the upper surface of the second semiconductor die. 
     
     
         15 . The semiconductor device of  claim 13 , further comprising:
 a fourth semiconductor die coupled to the upper surface of the third semiconductor die and having a lower surface facing the package substrate, wherein the fourth semiconductor die extends laterally beyond at least one side of the third semiconductor die to define an overhang portion of the fourth semiconductor die, and wherein the lower surface of the fourth semiconductor die includes fourth bond pads at the overhang portion of the fourth semiconductor die; and   second conductive features electrically coupling the fourth bond pads of the fourth semiconductor die to the package substrate.   
     
     
         16 . The semiconductor device of  claim 15  wherein the fourth semiconductor die has an upper surface opposite the lower surface, and further comprising a molded material over the package substrate, wherein the molded material does not extend away from the package substrate beyond a plane coplanar with the upper surface of the fourth semiconductor die. 
     
     
         17 . The semiconductor device of  claim 1  wherein the package substrate is at least one of an interposer, a printed circuit board, a dielectric spacer, or another semiconductor die. 
     
     
         18 . A semiconductor device, comprising:
 a redistribution structure having a first surface and a second surface opposite the first surface, wherein the first surface includes first conductive contacts and second conductive contacts, wherein the second surface includes third conductive contacts, and wherein the first conductive contacts and the second conductive contacts are electrically coupled to corresponding ones of the third conductive contacts by conductive lines extending through and/or on an insulating material;   a first semiconductor die coupled to the redistribution structure and having first bond pads;   wire bonds electrically coupling the first bond pads to the first conductive contacts of the redistribution structure;   a second semiconductor die stacked over the first semiconductor die and laterally offset from the first semiconductor die, wherein the second semiconductor die includes a surface having a first portion over the first semiconductor die and a second portion over the second conductive contacts of the redistribution structure, wherein the first portion is attached to the first semiconductor die via an adhesive die-attach material, and wherein the second portion includes second bond pads; and   conductive pillars coupling the second conductive contacts to the second bond pads.   
     
     
         19 . The semiconductor device of  claim 18  wherein the first semiconductor die and the second semiconductor die have the same planform shape. 
     
     
         20 . The semiconductor device of  claim 19  wherein the first semiconductor die and the second semiconductor die are identical, and wherein an arrangement of the first bond pads on the first semiconductor die is identical to an arrangement of the second bond pads on the second semiconductor die. 
     
     
         21 . The semiconductor device of  claim 18  wherein the first semiconductor die includes a pair of opposing sides, and wherein the second semiconductor die is laterally offset from the first semiconductor die only along an axis extending between the pair of opposing sides and parallel to the pair of opposing sides. 
     
     
         22 . The semiconductor device of  claim 21  wherein the first conductive contacts of the redistribution structure are spaced laterally outward from one of the pair of opposing sides, and wherein the second conductive contacts of the redistribution structure are spaced laterally outward from the other of the pair of opposing sides. 
     
     
         23 . The semiconductor device of  claim 19  wherein the die-attach material is a first die-attach material, and further comprising:
 a second die-attach material coupling the first semiconductor die to the redistribution structure, wherein the second die-attach material is the same as the first die-attach material. 
 
     
     
         24 . The semiconductor device of  claim 18  wherein the redistribution structure does not include a pre-formed substrate, and wherein a thickness of the redistribution structure between the first and second surfaces is less than about 50 μm. 
     
     
         25 - 28 . (canceled) 
     
     
         29 . The semiconductor device of  claim 1  wherein the package substrate is a redistribution structure that does not include a pre-formed substrate. 
     
     
         30 . The semiconductor device of  claim 18  wherein the redistribution structure does not include a pre-formed substrate.