Semiconductor device

Abstract

A semiconductor device having a semiconductor die, a redistribution layer (RDL), and an encapsulant. The RDL layer can be formed on a first surface of the semiconductor die. The encapsulant can enclose a second surface and side surfaces of the semiconductor die. The encapsulant can enclose side portions of the RDL.

1 . A semiconductor device, comprising:
 a semiconductor die comprising opposing sides;   a redistribution layer (RDL) formed on a first surface of the semiconductor die and coupled to a printed circuit board (PCB), wherein:
 opposing sides of the RDL extend completely beyond the opposing sides of the semiconductor die; and 
 there is not a semiconductor die that extends beyond the opposing sides of the RDL; 
   an encapsulant that encloses a second surface and side surfaces of the semiconductor die and side portions of the RDL.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the encapsulant encloses a portion of the RDL that is not in contact with the semiconductor die. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the RDL extends beyond an edge of the semiconductor die. 
     
     
         4 . The semiconductor device of  claim 1 , wherein interconnect structures are attached to a side of the RDL opposite the semiconductor die. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the encapsulant encloses portions of the RDL between the interconnect structures. 
     
     
         6 . A semiconductor device, comprising:
 a semiconductor die comprising opposing sides;   a redistribution layer (RDL) formed on a first surface of the semiconductor die and coupled to a printed circuit board (PCB), wherein:   the RDL extends completely beyond the opposing sides of the semiconductor die; and   there is only encapsulant between an edge of the RDL that extends completely beyond the opposing sides and a top of the encapsulant and the semiconductor die is between the RDL and the top of the encapsulant;   interconnect structures formed on a second surface of the RDL;   an encapsulant that encloses a second surface and side surfaces of the semiconductor die and portions of the RDL between the interconnect structures.   
     
     
         7 . The semiconductor device of  claim 6 , wherein the RDL extends beyond an edge of one of the opposing sides of the semiconductor die. 
     
     
         8 . The semiconductor device of  claim 6 , wherein the encapsulant encloses side portions of the RDL. 
     
     
         9 . The semiconductor device of  claim 6 , wherein the interconnect structures are not covered by underfill material. 
     
     
         10 . The semiconductor device of  claim 6 , wherein the encapsulant that encloses the portions of the RDL between the interconnect structures are configured to hold the interconnect structures in place and against the RDL. 
     
     
         11 . A method of forming a semiconductor device, comprising:
 forming a redistribution layer (RDL) on a carrier substrate;   forming a first encapsulant on the RDL;   removing a number of portions out of the first encapsulant;   detaching the carrier substrate;   attaching a semiconductor die to the RDL in place of the detached carrier substrate, wherein:
 the semiconductor die comprises opposing sides and the RDL extends completely beyond the opposing sides of the semiconductor die; and 
 there is not a semiconductor die that extends beyond opposing sides of the RDL; 
   forming a second encapsulant that encloses the semiconductor die and portions of the RDL facing toward but not in contact with the semiconductor die; and   attaching a number of interconnect structures into each of the number of portions removed from the first encapsulant.   
     
     
         12 . The method of  claim 11 , wherein forming the first encapsulant comprises forming the first encapsulant to enclose side portions of the RDL. 
     
     
         13 . The method of  claim 12 , wherein the second encapsulant is formed to connect, at the side portions of the RDL, to the first encapsulant. 
     
     
         14 - 16 . (canceled) 
     
     
         17 . A method for forming a semiconductor device, comprising:
 forming a redistribution layer (RDL) on a carrier substrate;   attaching a number of interconnect structures onto a surface of the RDL opposite the carrier substrate;   molding a first encapsulant onto the RDL between each of the number of interconnect structures;   detaching the carrier substrate;   attaching a semiconductor die to the RDL in place of the detached carrier substrate, wherein:
 semiconductor die comprises opposing sides; 
 the RDL completely extends beyond the opposing sides of the semiconductor die; there is only encapsulant between an edge of the RDL that extends completely beyond the opposing sides of the semiconductor die and a top of the encapsulant and the semiconductor die is between the RDL and the top of the encapsulant; and 
 the RDL is between the semiconductor die and a printed circuit board; 
   forming a second encapsulant that encloses the semiconductor die.   
     
     
         18 . The method of  claim 17 , wherein molding the first encapsulant onto the RDL layer includes using an injection molding process. 
     
     
         19 . The method of  claim 17 , wherein molding of the first encapsulant onto the RDL layer includes using a compression molding process. 
     
     
         20 . (canceled) 
     
     
         21 . The method of  claim 17 , wherein the number of interconnect structures are attached beyond edges of the semiconductor die associated with the opposing sides of the semiconductor die. 
     
     
         22 . The method of  claim 1 , wherein:
 there is only encapsulant between the edge of the RDL that extends completely beyond the opposing sides and a top of the encapsulant; and   the semiconductor die is between the RDL and the top of the encapsulant.   
     
     
         23 . The method of  claim 1 , wherein the RDL is between the semiconductor die and the PCB. 
     
     
         24 . The method of  claim 6 , wherein opposing sides of the RDL are extending completely beyond the opposing sides of the semiconductor die and there is not a semiconductor die that extends beyond the opposing sides of the RDL. 
     
     
         25 . The method of  claim 6 , wherein the RDL is between the semiconductor die and the PCB.