Manufacturing method of semiconductor device

Abstract

Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

1 - 13 . (canceled) 
     
     
         14 . A manufacturing method of a semiconductor device, comprising the steps of:
 (a) providing a semiconductor wafer equipped with a plurality of device formation regions,   each device formation region having a semiconductor circuit, a pad electrically coupled to the semiconductor circuit, a first insulating film formed over the pad such that a surface portion of the pad is exposed from an opening of the first insulating film, and a second insulating film formed over the first insulating film such that the surface portion of the pad is exposed from the second insulating film;   (b) contacting a probe needle to a first region of the surface portion of the pad of each device formation region; and   (c) after the step (b), forming an interconnect layer over a second region of the surface portion of each pad adjacent to the first region by plating, such that the interconnect layer is electrically coupled to the pad at the second region.   
     
     
         15 . The manufacturing method of a semiconductor device according to  claim 14 , further comprising the steps of:
 (d) after the step (c), coupling a conductive member to one end portion of the interconnect layer, an opposite end portion of the interconnect layer being coupled to the second region of the surface portion of the pad;   (e) after the step (d), cutting the semiconductor wafer between the device formation regions into a plurality of semiconductor chips; and   (f) after the step (e), mounting each semiconductor chip over a substrate via the respective conductive member.   
     
     
         16 . The manufacturing method of a semiconductor device according to  claim 15 , wherein the conductive member is a bump electrode. 
     
     
         17 . The manufacturing method of a semiconductor device according to  claim 14 , further comprising the steps of:
 (d) after the step (c), cutting the semiconductor wafer between the device formation regions into a plurality of semiconductor chips; and   for each semiconductor chip:
 (e) after the step (d), coupling a conductive member to one end portion of the interconnect layer, an opposite end portion of the interconnect layer being coupled to the second region of the surface portion of the pad; and 
 (f) after the step (e), electrically coupling the pad of the semiconductor chip to a bonding lead of a substrate via the conductive member. 
   
     
     
         18 . The manufacturing method of a semiconductor device according to  claim 17 , wherein the conductive member is a wire.