Technologies for control flow exploit mitigation using processor trace

Abstract

Technologies for control flow exploit mitigation include a computing device having a processor with real-time instruction tracing support. During execution of a process, the processor generates trace data indicative of control flow of the process. The computing device analyzes the trace data to identify suspected control flow exploits. The computing device may use heuristic algorithms to identify return-oriented programming exploits. The computing device may maintain a shadow stack based on the trace data. The computing device may identify indirect branches to unauthorized addresses based on the trace data to identify jump-oriented programming exploits. The computing device may check the trace data whenever the process is preempted. The processor may detect mispredicted return instructions in real time and invoke a software handler in the process space of the process to verify and maintain the shadow stack. Other embodiments are described and claimed.

1 . A computing device for exploit mitigation, the computing device comprising:
 a processor comprising a processor trace module to generate trace data indicative of control flow of a process of the computing device;   an exploit detector module to (i) update a shadow stack based on the trace data, (ii) analyze the shadow stack using a heuristic algorithm to identify a suspected return-oriented programming exploit, and (iii) determine a cost value in response to identification of the suspected return-oriented programming exploit, wherein the cost value is indicative of a likelihood that the suspected return-oriented programming exploit is an actual return-oriented programming exploit; and   a security response module to handle the suspected return-oriented programming exploit based on the cost value.   
     
     
         2 . The computing device of  claim 1 , wherein to generate the trace data indicative of the control flow of the process of the computing device comprises to output a target instruction pointer packet including a next linear instruction pointer in response to execution of a direct call instruction. 
     
     
         3 . The computing device of  claim 2 , wherein to generate the trace data indicative of the control flow of the process of the computing device further comprises to output a packet including a current stack pointer value in response to execution of a call instruction or a return instruction. 
     
     
         4 . The computing device of  claim 3 , wherein:
 to generate the trace data indicative of the control flow of the process of the computing device further comprises to determine whether a new stack page is being accessed; and   to output the packet including the current stack pointer value further comprises to output the packet including the current stack pointer value in response to a determination that the new stack page is being accessed.   
     
     
         5 . The computing device of  claim 1 , wherein:
 the exploit detector module is further to detect preemption of the process during execution of the process; and   to update the shadow stack comprises to update the shadow stack in response to the preemption of the process.   
     
     
         6 . The computing device of  claim 1 , wherein to analyze the shadow stack using a heuristic algorithm to identify a suspected return-oriented programming exploit comprises to compare the shadow stack to a system stack of the computing device. 
     
     
         7 . The computing device of  claim 1 , wherein:
 to determine the cost value in response to identification of the suspected return-oriented programming exploit comprises to (i) subtract the cost value from a total cost budget and (ii) determine whether the total cost budget has been exceeded; and   to handle the suspected return-oriented programming exploit based on the cost value comprises to handle the suspected return-oriented programming exploit in response to a determination that the total cost budget has been exceeded.   
     
     
         8 . The computing device of  claim 1 , wherein to determine the cost value in response to identification of the suspected return oriented programming exploit comprises to calculate the cost value as a function of a gadget length of the suspected return oriented programming exploit. 
     
     
         9 . The computing device of  claim 8 , wherein to calculate the cost value comprises to assign a higher cost value to a shorter gadget length. 
     
     
         10 . One or more computer-readable storage media comprising a plurality of instructions that in response to being executed cause a computing device to:
 generate, by a processor trace module of a processor of the computing device, trace data indicative of control flow of a process of the computing device;   update a shadow stack based on the trace data;   analyze the shadow stack using a heuristic algorithm to identify a suspected return-oriented programming exploit;   determine a cost value in response to identification of the suspected return-oriented programming exploit, wherein the cost value is indicative of a likelihood that the suspected return-oriented programming exploit is an actual return-oriented programming exploit; and   handle the suspected return-oriented programming exploit based on the cost value.   
     
     
         11 . The one or more computer-readable storage media of  claim 10 , wherein to generate the trace data indicative of the control flow of the process of the computing device comprises to output a target instruction pointer packet including a next linear instruction pointer in response to execution of a direct call instruction. 
     
     
         12 . The one or more computer-readable storage media of  claim 11 , wherein to generate the trace data indicative of the control flow of the process of the computing device further comprises to output a packet including a current stack pointer value in response to execution of a call instruction or a return instruction. 
     
     
         13 . The one or more computer-readable storage media of  claim 12 , wherein:
 to generate the trace data indicative of the control flow of the process of the computing device further comprises to determine whether a new stack page is being accessed; and   to output the packet including the current stack pointer value further comprises to output the packet including the current stack pointer value in response to a determination that the new stack page is being accessed.   
     
     
         14 . The one or more computer-readable storage media of  claim 10 , wherein to determine the cost value in response to identification of the suspected return oriented programming exploit comprises to calculate the cost value as a function of a gadget length of the suspected return oriented programming exploit. 
     
     
         15 . A computing device for real-time exploit mitigation, the computing device comprising:
 a processor comprising a processor trace module to (i) generate trace data indicative of control flow of a process of the computing device, (ii) detect a suspected return-oriented programming exploit that is a mispredicted return instruction using the trace data, and (iii) invoke a mispredicted return handler in response to detection of the suspected return-oriented programming exploit;   an exploit detector module to (i) determine whether a current shadow stack is valid in response to invocation of the mispredicted return handler, (ii) update the current shadow stack based on the trace data in response to a determination that the current shadow stack is valid, (iii) compute a message authentication code based on the current shadow stack in response to updating of the current shadow stack, (iv) encode the message authentication code using a handler key, wherein the handler key is located in a protected memory region, and (v) output the encoded message authentication code to the trace data; and   a security response module to handle the suspected return-oriented programming exploit in response to a determination that the current shadow stack is not valid.   
     
     
         16 . The computing device of  claim 15 , wherein to output the encoded message authentication code comprises to execute a processor instruction to write the encoded message authentication code to the trace data. 
     
     
         17 . The computing device of  claim 15 , wherein to output the encoded message authentication code comprises to execute one or more branch instructions based on the encoded message authentication code to output coded data to the trace data. 
     
     
         18 . The computing device of  claim 15 , wherein to determine whether the current shadow stack is valid comprises to:
 extract an encoded message authentication code from the trace data;   compute a second message authentication code based on the current shadow stack;   encode the second message authentication code to generate an encoded second message authentication code using a handler key, wherein the handler key is located in a protected memory region; and   compare the encoded message authentication code to the encoded second message authentication code.   
     
     
         19 . The computing device of  claim 18 , wherein to encode the second message authentication code comprises to recover the handler key from an immediate value stored in execute-only memory. 
     
     
         20 . The computing device of  claim 18 , wherein to extract the encoded message authentication code from the trace data comprises to:
 identify a memory address associated with the trace data, wherein the memory address is supplied by the processor trace module of the processor; and   search in the trace data from the memory address associated with the trace data for the encoded message authentication code.