Solid-state imaging device, image data transmission method, and camera system

Abstract

A differential driver includes first and second MOS transistors including drains which are respectively coupled to first and second output terminals; third and fourth MOS transistors including sources which are respectively coupled to the first and the second output terminals, and first and second resistors including one end which is respectively coupled to the first output terminal and the second output terminal, and an other end which is commonly coupled to a first node.

What is claimed is: 
     
         1 . A differential driver comprising:
 first and second MOS transistors including sources which are respectively coupled to first and second current sources, gates which are respectively coupled to first and second input terminals, and drains which are respectively coupled to first and second output terminals;   third and fourth MOS transistors including sources which are respectively coupled to the first and the second output terminals, gates which are respectively coupled to the second and the first input terminals, and drains which are respectively coupled to an output common voltage control circuit; and   first and second resistors including one end which is respectively coupled to the first output terminal and the second output terminal, and an other end which is commonly coupled to a first node,   wherein the output common voltage control circuit controls a voltage of the drains of the third and the fourth MOS transistors so that a common voltage of the first node becomes a predetermined voltage.   
     
     
         2 . A differential driver according to  claim 1 , wherein the output common voltage control circuit comprises:
 fifth and sixth MOS transistors including drains which are respectively coupled to the drains of the third and the fourth MOS transistors, and gates which are input with a voltage corresponding to a reference voltage; and   a seventh MOS transistor including a drain which is commonly coupled to sources of the fifth and the sixth MOS transistor, and a gate which is input with the common voltage.   
     
     
         3 . A differential driver according to  claim 1 , wherein the output common voltage control circuit comprises:
 an operational amplifier which inputs a reference signal and the common voltage; and   fifth and sixth MOS transistors including drains which are respectively coupled to the drains of the third and the fourth MOS transistors, and gates to which an output signal of the operational amplifier is input.   
     
     
         4 . A differential driver according to  claim 1 , wherein the first, the second, the third and the fourth MOS transistors comprise thin-film P-channel MOS transistors. 
     
     
         5 . A differential driver according to  claim 2 , wherein the seventh MOS transistor comprises a thin-film N-channel MOS transistor. 
     
     
         6 . A differential driver comprising:
 first and second MOS transistors including sources which are respectively coupled to first and second current sources, gates which are respectively coupled to first and second input terminals, and drains which are respectively coupled to first and second output terminals;   third and fourth MOS transistors including sources which are respectively coupled to the first and the second output terminals, and gates which are respectively coupled to the second and the first input terminals;   fifth and sixth MOS transistors including drains which are respectively coupled to the drains of the third and the fourth MOS transistors, and gates which are input with a voltage corresponding to a reference voltage; and   seventh and eighth MOS transistors including drains which are commonly coupled to sources of the fifth and the sixth MOS transistors,   wherein the gate of the seventh MOS transistor is coupled to an output of the first terminal, and   the gate of the eighth MOS transistor is coupled to an output of the second terminal.   
     
     
         7 . A differential driver according to  claim 6 , wherein the seventh and eighth MOS transistors comprise thick-film N-channel MOS transistors.