Trench mosfet having an independent coupled element in a trench

Abstract

A trench MOSFET is disclosed that includes a semiconductor substrate having a vertically oriented trench containing a gate. The trench MOSFET further includes a source, a drain, and a conductive element. The conductive element, like the gate is contained in the trench, and extends between the gate and a bottom of the trench. The conductive element is electrically isolated from the source, the gate, and the drain. When employed in a device such as a DC-DC converter, the trench MOSFET may reduce power losses and electrical and electromagnetic noise.

What is claimed is: 
     
         1 . A method comprising:
 forming a first transistor, comprising:
 forming a first trench formed in a first semiconductor substrate; 
 forming a first source; 
 forming a first drain; 
 forming a first gate; and 
 forming a first conductive element in the first trench; 
   wherein the first conductive element extends between the first gate and a bottom of the first trench; and   wherein the first conductive element is isolated from the first source and the first gate by an insulating material;   
     
     
         2 . The method of  claim 1  further comprising:
 forming a second transistor comprising:
 forming a second trench in a second semiconductor substrate; 
 forming a second source; 
 forming a second drain; 
 forming a second gate; and 
 forming a second conductive element in the second trench; 
 
 wherein the second conductive element extends between the second gate and a bottom of the second trench; and 
 wherein the second conductive element is isolated from the second source and the second gate by an insulating material. 
 
     
     
         3 . The method of  claim 1  wherein the first semiconductor substrate comprises a first drain layer, a first drift layer, a first base layer, and a first source layer, wherein the first drift and base layers extend between the first drain and source layers, wherein the first base layer extends between the first source drift layers, wherein the first source and base layers are in ohmic contact with the first source, and wherein the first drain layer is in ohmic contact with the first drain, and wherein the first conductive element extends between the first gate and the first drain layer. 
     
     
         4 . The method of  claim 3 , wherein the first trench extends into the first source, base, and drift layers, but not into the first drain layer, and wherein the first gate is adjacent the first base layer and is configured to influence the conductance thereof. 
     
     
         5 . The method of  claim 1  wherein a lateral thickness of insulating material between the first gate and the trench is less than a lateral thickness of insulating material between the first conductive element and the trench. 
     
     
         6 . The method of  claim 5  wherein a distance between opposing sidewalls of the trench adjacent the first gate is greater than a distance between opposing sidewalls of the trench adjacent the first conductive element. 
     
     
         7 . The method of  claim 5  wherein a cross sectional width of the first gate is greater than a cross sectional width of the first conductive element. 
     
     
         8 . The method of  claim 1  wherein a length of the first gate is equal to or greater than a length of the first conductive element. 
     
     
         9 . The method of  claim 1  wherein a width of insulating material between the first gate and the first conductive element is greater than a lateral thickness of insulating material between the first gate and the trench. 
     
     
         10 . The method of  claim 1  wherein the first transistor comprises a base layer extending between a source layer and a drift layer, wherein the trench extends through each of the source, base, and drift layers, wherein a length of the base layer that extends between the source layer and the drift layer is greater than an extension of the first gate past a boundary between the base layer and the drift layer. 
     
     
         11 . The method of  claim 1  further comprising:
 forming a second transistor comprising:
 forming a second trench in a second semiconductor substrate; 
 forming a second source; 
 forming a second drain; 
 forming a second gate; and 
 forming a second conductive element in the second trench; 
 
 wherein the second conductive element extends between the second gate and a bottom of the second trench; and 
 wherein the second conductive element is isolated from the second source and the second gate by an insulating material; and 
 wherein the first and second drains are electrically coupled to each other. 
 
     
     
         12 . A method comprising:
 forming a trench MOSFET in a semiconductor substrate including a trench having opposing sidewalls and a bottom, a gate, a source and a drain;   forming an additional trench element in the trench that is positioned between the gate and the bottom of the trench and electrically isolated from the gate, the drain and the source,   wherein the additional trench element comprises a same conductive material as the gate, and   wherein the additional trench element shields the gate from the drain.   
     
     
         13 . The method of  claim 12 , wherein forming the additional trench element includes selecting dimensions of the trench MOSFET to reduce one or both of resistive effects and capacitive effects. 
     
     
         14 . The method of  claim 13 , wherein selecting dimensions includes controlling a lateral thickness G of a gate oxide to be less than a lateral thickness H of an insulating region adjacent to the additional trench element. 
     
     
         15 . The method of  claim 13 , wherein selecting dimensions includes controlling a length of a first portion of the gate to be less than a second portion of the gate. 
     
     
         16 . The method of  claim 13 , wherein selecting dimensions includes controlling a width C between sidewalls of a first portion of the trench to be less than a width D between sidewalls of a second portion of the trench. 
     
     
         17 . The method of  claim 13 , wherein selecting dimensions includes controlling a length E of the additional trench element to be equal to or greater than a length of the gate.