Method for manufacturing traces of pcb
Abstract
A method for manufacturing traces of a printed circuit board (PCB) comprises an application of the periodic pulse reverse (PPR) pattern plating process. In the first stage, walls and bottoms in drilled holes of the PCB are modified with reduced graphene oxide (rGO) so that the vias can be formed by filling with copper and a very thin copper layer can be formed on the substrate through the electroplating process. In the second stage, a pattern of very fine traces with width/space less than 30/30 μm is formed on the thin copper layer and then the traces are formed through the PPR pattern plating process. After removing unwanted copper layer, the traces with even thicknesses and square profiles are achieved and thus conform to requirements of the high density interconnection (HDI) technology.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A printed circuit board, comprising:
a nonconductive substrate with drilled holes; vias formed in the drilled holes and comprising:
copper filling; and
reduced graphene oxide (rGO) formed between inner walls and bottoms of the drilled holes and the copper filling; and
fine traces having widths of 3-50 μm and interval spaces of 3-50 μm, each fine trace comprising:
a copper cladding layer formed on the nonconductive substrate;
a thin flat copper layer formed on the copper cladding layer and having a thickness of 1-20 μm at a variation of less than 10%; and
a PPR plated copper layer formed on the thin flat copper layer and having a thickness of 5-50 μm at a variation of less than 15%.
2 . The printed circuit board of claim 1 , wherein the drilled holes have an interval space of 0.1-1 mm and each of the holes has a diameter of 10-200 μm and a depth of 10-200 μm.
3 . The printed circuit board of claim 1 , wherein the fine traces have widths of 3-30 μm and interval spaces of 3-30 μm.Join the waitlist — get patent alerts
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