US2018358301A1PendingUtilityA1
Semiconductor device and its manufacturing method
Est. expiryJun 9, 2036(~9.9 yrs left)· nominal 20-yr term from priority
Inventors:Yoshikazu Tsunemine
H10P 76/204H10P 50/283H10W 46/501H10W 46/301H10W 46/101H10W 46/00H10P 74/203H10P 74/27H01L 21/31111H01L 21/0273H01L 23/544H01L 2223/5442H01L 29/0649H01L 2223/54426H01L 2223/54453H10D 30/603H10D 62/116H10D 62/115H10D 30/0221
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Claims
Abstract
A mark is formed over the surface of a silicon substrate. The mark includes a silicon oxide film, in which a plurality of rectangular groove patterns are concentrically arranged, and a silicon nitride film formed in the groove patterns. A P-type epitaxial layer is formed over the surface of the silicon substrate. Then, a photoresist pattern is formed. In the photoresist pattern, a rectangular opening pattern is formed in a mark region. Optical superposition inspection is performed for the base of the photoresist pattern.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a crystal substrate; a mark which is formed in a first region in the crystal substrate; a crystal layer which is formed over the crystal substrate excluding a region where the mark is arranged; and an interlayer insulating film which is formed to cover the mark and the crystal layer, wherein the mark includes
a first insulating film which has a groove pattern, and
a second insulating film which is formed in the groove pattern and has a material different from that of the first insulating film.
2 . The semiconductor device according to claim 1 ,
wherein an upper surface of the second insulating film is in a position lower than an upper surface of the first insulating film.
3 . The semiconductor device according to claim 1 ,
wherein a lower surface of the second insulating film is in a position higher than a lower surface of the first insulating film.
4 . The semiconductor device according to claim 1 ,
wherein a lower surface of the second insulating film is in a position lower than a lower surface of the first insulating film.
5 . The semiconductor device according to claim 1 , further comprising
a high withstand voltage transistor which is formed in a second region in the crystal layer, and wherein the interlayer insulating film is formed to cover the high withstand voltage transistor.
6 . The semiconductor device according to claim 1 ,
wherein the first insulating film is any one of a silicon oxide film and a silicon nitride film, and wherein the second insulating film is other one of the silicon oxide film and the silicon nitride film.Join the waitlist — get patent alerts
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