Current mode 3-state buck-boost pwm control architecture

Abstract

A voltage regulator includes a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.

What is claimed is: 
     
         1 . A voltage regulator, comprising:
 a converter comprising a switching circuit coupled to an inductor for converting an input voltage to an output voltage; and   a modulator that controls said switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation, wherein during said buck-boost mode of operation, said modulator controls said switching circuit during each switching cycle to sequentially switch between three different switching states, comprising:
 a first switching state that applies said input voltage across said inductor; 
 a second switching state that applies a difference between said input and output voltages across said inductor; and 
 a third switching state that applies said output voltage across said inductor, 
 wherein the modulator controls a duration of the second switching state by generating a time delay at the end of the first switching state, and wherein the second switching state ends and the third switching state begins after the time delay. 
   
     
     
         2 . The voltage regulator of  claim 1 , wherein said modulator is operative during said buck-boost mode of operation to control said switching circuit to:
 couple a first end of said inductor to said input voltage and couple a second end of said inductor to a reference source voltage during said first switching state;   couple said first end of said inductor to said input voltage and couple said second end of said inductor to said output voltage during said second switching state; and   couple said first end of said inductor to said reference source voltage and couple said second end of said inductor to said output voltage during said third switching state.   
     
     
         3 . The voltage regulator of  claim 1 , wherein:
 said switching circuit comprises:
 a first switch coupled between said input voltage and a first end of said inductor; 
 a second switch coupled between said first end of said inductor and a reference source voltage node; 
 a third switch coupled between a second end of said inductor and said reference source voltage node; and 
 a fourth switch coupled between said output voltage and said second end of said inductor; and 
   wherein said modulator is operative during said buck-boost mode of operation to:
 turn on said first and third switches and turn off said second and fourth switches during said first switching state; 
 turn on said first and fourth switches and turn off said second and third switches during said second switching state; and 
 turn on said second and fourth switches and turn off said first and third switches during said third switching state. 
   
     
     
         4 . The voltage regulator of  claim 1 , further comprising a comparator system that compares said input voltage with said output voltage and that selects said buck-boost mode of operation when said input voltage is within a predetermined percentage of said output voltage, that selects said buck mode of operation when said input voltage is greater than said output voltage by more than said predetermined percentage of said output voltage, and that selects said boost mode of operation when said input voltage is less than said output voltage by more than said predetermined percentage of said output voltage. 
     
     
         5 . The voltage regulator of  claim 1 , wherein said modulator controls said second switching state by causing the duration to be a predetermined percentage of said each switching cycle. 
     
     
         6 . The voltage regulator of  claim 1 , wherein said modulator controls said second switching state by causing the duration to be a programmable percentage of said each switching cycle. 
     
     
         7 . The voltage regulator of  claim 1 , further comprising:
 an error amplifier circuit that develops a modulation control voltage based on comparing a voltage indicative of said output voltage with an output reference indicative of a target level of said output voltage;   wherein said switching circuit further comprises:
 a buck power stage that selectively couples a first end of said inductor either to said input voltage or to a reference source voltage as controlled by a buck pulse control signal; and 
 a boost power stage that selectively couples a second end of said inductor either to said output voltage or to said reference source voltage as controlled by a boost pulse control signal; and 
   wherein said modulator uses said input voltage, said output voltage and said modulation control voltage to generate said buck pulse control signal and said boost pulse control signal.   
     
     
         8 . The voltage regulator of  claim 1 , wherein said modulator transitions between said first, second and third switching states based on voltage applied across said inductor. 
     
     
         9 . The voltage regulator of  claim 1 , wherein said modulator transitions between said first, second and third switching states based on current through said inductor. 
     
     
         10 . A method of converting an input voltage to an output voltage, comprising:
 operating a converter with an inductor in a selected one of a buck operating mode, a boost operating mode, and a buck-boost operating mode; and   during the buck-boost operating mode for each switching cycle, operating the converter to sequentially switch between first, second and third switching states, comprising:
 applying the input voltage across the inductor during the first switching state; 
 applying a difference between the input and output voltages across the inductor during the second switching state; 
 controlling a duration of the second switching state by generating a time delay at the end of the first switching state, wherein the second switching state ends and the third switching state begins after the time delay; and 
 applying the output voltage across the inductor during the third switching state. 
   
     
     
         11 . The method of  claim 10 , wherein said operating the converter during the buck-boost operating mode comprises:
 coupling the first end of the inductor to the input voltage and coupling the second end of the inductor to the reference source voltage during the first switching state;   coupling the first end of the inductor to the input voltage and coupling the second end of the inductor to the output voltage during the second switching state; and   coupling the first end of the inductor to the reference source voltage and coupling the second end of the inductor to the output voltage during the third switching state.   
     
     
         12 . The method of  claim 10 , further comprising:
 comparing the input voltage with the output voltage;   selecting the buck-boost operating mode when the input voltage is within a predetermined percentage of the output voltage;   selecting the buck operating mode when the input voltage is greater than the output voltage by more than the predetermined percentage of the output voltage; and   selecting the boost operating mode when said input voltage is less than said output voltage by more than said predetermined percentage of said output voltage.   
     
     
         13 . The method of  claim 10 , wherein said operating the converter during the buck-boost operating mode comprises operating the converter in the second switching state for the duration that is a programmable percentage of each switching cycle. 
     
     
         14 . The method of  claim 10 , wherein said operating the converter to sequentially switch between first, second and third switching states comprises operating the converter to sequentially switch between first, second and third switching states based on voltage applied across the inductor. 
     
     
         15 . The method of  claim 10 , wherein said operating the converter to sequentially switch between first, second and third switching states comprises operating the converter to sequentially switch between first, second and third switching states based on current through the inductor. 
     
     
         16 . A voltage regulator, comprising:
 a converter comprising a switching circuit coupled to an inductor for converting an input voltage to an output voltage;   a modulator that controls said switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation, wherein during said buck-boost mode of operation, said modulator controls said switching circuit during each switching cycle to sequentially switch between three different switching states; and   an error amplifier circuit that develops a modulation control voltage based on comparing a voltage indicative of said output voltage with an output reference indicative of a target level of said output voltage,   wherein said switching circuit comprises:
 a buck power stage that selectively couples a first end of said inductor either to said input voltage or to a reference source voltage as controlled by a buck pulse control signal; and 
 a boost power stage that selectively couples a second end of said inductor either to said output voltage or to said reference source voltage as controlled by a boost pulse control signal, and 
   wherein said modulator uses said input voltage, said output voltage and said modulation control voltage to generate said buck pulse control signal and said boost pulse control signal, and   wherein said modulator comprises:
 a ramp generator that develops a ramp control voltage based on said input voltage, said output voltage, a first pulse control signal and a second pulse control signal; 
 a comparator circuit that compares said modulation control voltage with said ramp control voltage for developing said first pulse control signal; 
 a controlled delay circuit that develops said second pulse control signal based on said first pulse control signal by transitioning said second pulse control signal to a first state when said first pulse control signal is transitioned to said first state, and by transitioning said second pulse control signal to a second state after a programmed delay period after said first pulse control signal has transitioned to said second state; and 
 a pulse control system that develops said buck pulse control signal as a buffered version of said second pulse control signal and that develops said boost pulse control signal as an inverted version of said first pulse control signal.