Display panels and methods for driving the display panel

Abstract

A display panel includes a first gate line, a second gate line, a first data line and a second data line. The first pixel unit and the second pixel unit are disposed between the first gate line and the second gate line. During a first period of time, a first scan pulse is provided to the first gate line, a voltage on the first data line is changed from a first predefined voltage to a first voltage, thereby generating a first voltage shift, and a voltage on the second data line is changed from a second predefined voltage to a second voltage, thereby generating a second voltage shift. One of the first voltage shift and the second voltage shift is greater than zero, and the other is less than zero.

What is claimed is: 
     
         1 . A display panel, comprising:
 a first gate line and a second gate line, adjacent to each other and extending in a first direction;   a first data line and a second data line, adjacent to each other and extending in a second direction perpendicular to the first direction;   a first pixel unit, disposed between the first gate line and the second gate line, and coupled to the first gate line and the first data line via a first thin film transistor; and   a second pixel unit, disposed between the first gate line and the second gate line, and coupled to the second gate line and the second data line via a second thin film transistor,   wherein during a first period of time, a first scan pulse is provided to the first gate line, a voltage of the first data line is changed from a first predefined voltage to a first voltage and generates a first voltage shift, and a voltage of the second data line is changed from a second predefined voltage to a second voltage and generates a second voltage shift,   wherein one of the first voltage shift and the second voltage shift is greater than zero, and the other of the first voltage shift and the second voltage shift is less than zero.   
     
     
         2 . The display device as claimed in  claim 1 , wherein the first pixel unit is disposed adjacent to the second pixel unit. 
     
     
         3 . The display device as claimed in  claim 1 , further comprising:
 a control unit, providing the second voltage shift to the second data line.   
     
     
         4 . The display device as claimed in  claim 1 , further comprising:
 a third gate line, disposed adjacent to the second gate line and extending in the first direction,   wherein the second gate line is disposed between the third gate line and the first gate line, and a distance in the second direction between the first gate line and the second gate line is greater than a distance in the second direction between the second gate line and the third gate line.   
     
     
         5 . The display device as claimed in  claim 1 , further comprising:
 a third gate line, disposed adjacent to the second gate line and extending in the first direction,   wherein the second gate line is disposed between the third gate line and the first gate line, and a length of the first pixel unit in the second direction is greater than a distance in the second direction between the second gate line and the third gate line.   
     
     
         6 . The display device as claimed in  claim 1 , wherein the first gate line and the second gate line are disposed in parallel. 
     
     
         7 . The display device as claimed in  claim 1 , wherein the first data line and the second data line are disposed in parallel. 
     
     
         8 . The display device as claimed in  claim 1 , wherein the first voltage shift is substantial equal to the second voltage shift. 
     
     
         9 . The display device as claimed in  claim 1 , wherein the first data line is adjacent to the second data line. 
     
     
         10 . A display device, comprising:
 a first gate line and a second gate line, adjacent to each other and extending in a first direction; and   a first data line and a second data line, adjacent to each other and extending in a second direction perpendicular to the first direction;   wherein there is no thin film transistor disposed adjacent to at least one of the following intersections: the intersection of the first gate line and the first data line, the intersection of the first gate line and the second data line, the intersection of the second gate line and the first data line, and the intersection of the second gate line and the second data line.   
     
     
         11 . The display device as claimed in  claim 10 , wherein during a first period of time, when a scan pulse is provided to the first gate line, a voltage of the first data line is changed from a first predefined voltage to a first voltage and generates a first voltage shift, a voltage of the second data line is changed from a second predefined voltage to a second voltage and generates a second voltage shift, one of the first voltage shift and the second voltage shift is greater than zero, and the other of the first voltage shift and the second voltage shift is less than zero. 
     
     
         12 . The display device as claimed in  claim 10 , wherein the first voltage shift is substantial equal to the second voltage shift. 
     
     
         13 . The display device as claimed in  claim 10 , wherein the first data line is adjacent to the second data line. 
     
     
         14 . A method for driving a display panel, suitable for driving a display panel which comprises a first gate line extending in a first direction, a first data line and a second data line that extend in a second direction perpendicular to the first direction, and a first pixel unit coupled to the first gate line and the first data line via a first thin film transistor, the method comprising:
 during a first period of time, determining a first voltage provided to the first data line a corresponding to the first pixel unit, wherein a first voltage shift will be generated on the first data line when the first voltage is provided;   determining a second voltage shift to be generated on the second data line according to the first voltage shift;   determining a second voltage provided to the second data line according to the second voltage shift; and   when a first scan pulse is provided to the first gate line, providing the first voltage to the first data line and providing the second voltage to the second data line.   
     
     
         15 . The method as claimed in  claim 14 , wherein the display panel further comprises a second gate line disposed adjacent to the first gate line and extending in the first direction, and a second pixel unit coupled to the second gate line and the second data line via a second thin film transistor, the method further comprising:
 not charging the second pixel unit via the second data line during the first period of time.   
     
     
         16 . The method as claimed in  claim 14 , wherein one of the first voltage shift and the second voltage shift is greater than zero, and the other of the first voltage shift and the second voltage shift is less than zero. 
     
     
         17 . The method as claimed in  claim 14 , wherein an absolute value of the first voltage shift and an absolute value of the second voltage shift are substantially the same. 
     
     
         18 . The method as claimed in  claim 14 , wherein the display panel further comprises a second gate line disposed adjacent to the first gate line and extending in the first direction, and a second pixel unit coupled to the second gate line and the second data line via a second thin film transistor, the method further comprising:
 during a second period of time, determining a third voltage provided to the second data line corresponding to the second pixel unit, wherein a third voltage shift will be generated on the second data line when the third voltage is provided;   determining a fourth voltage shift to be generated on the first data line according to the third voltage shift;   determining a fourth voltage provided to the first data line according to the fourth voltage shift; and   when a second scan pulse is provided to the second gate line, providing the fourth voltage to the first data line and providing the third voltage to the second data line.   
     
     
         19 . The method as claimed in  claim 18 , wherein one of the third voltage shift and the fourth voltage shift is greater than zero, and the other of the third voltage shift and the fourth voltage shift is less than zero. 
     
     
         20 . The method as claimed in  claim 18 , wherein an absolute value of the third voltage shift and an absolute value of the fourth voltage shift are substantially the same.