US2018323353A1PendingUtilityA1

Sealed semiconductor light emitting device

Assignee: LUMILEDS LLCPriority: Mar 30, 2012Filed: Jul 9, 2018Published: Nov 8, 2018
Est. expiryMar 30, 2032(~5.7 yrs left)· nominal 20-yr term from priority
H10W 72/0198H10W 72/07336H10W 72/073H10W 72/07307H10W 72/07302H10W 72/354H10W 72/353H10W 72/352H10W 72/321H10W 90/734H10P 72/7438H10P 72/7426H10P 72/744H10P 72/74H10W 74/014H01L 33/0075H01L 2224/29186H01L 33/387H01L 2224/94H01L 2224/29144H01L 2224/83005H01L 2224/29076H01L 2221/6835H01L 2924/12041H01L 24/83H01L 21/6835H01L 2924/01322H01L 2933/0016H01L 2224/83815H01L 2224/83192H01L 33/382H01L 2933/0066H01L 2224/32227H01L 2924/12042H01L 33/0025H01L 2224/2919H01L 2933/005H01L 33/62H01L 33/52H01L 2221/68381H01L 24/94H01L 2224/32235H01L 24/29H01L 2224/83007H01L 33/0079H01L 21/561H01L 2221/68377H01L 33/007H01L 24/32H01L 33/32H10H 20/8312H10H 20/01335H10H 20/0364H10H 20/0362H10H 20/032H10H 20/8316H10H 20/857H10H 20/825H10H 20/824H10H 20/811H10H 20/0137H10H 20/018H10H 20/852
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Claims

Abstract

A light-emitting device is described herein. The device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The device also includes a metal layer with openings formed therein and filled with an insulating material. The openings separate the metal layer into a first portion that is electrically isolated from a second portion. The first portion is coupled to the n-type region and the second portion coupled to the p-type region. The device also includes conductive stacks. A first surface of each of the conductive stacks contacts a surface of the metal layer opposite the semiconductor structure. A respective gap is positioned between each of the conductive stacks. A body is in direct contact with a second surface of each of the conductive stacks that is opposite the first surface.

Claims

exact text as granted — not AI-modified
1 . A device comprising:
 a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region;   a metal layer having openings formed therein and filled with an insulating material, the openings separating the metal layer into a first portion that is electrically isolated from a second portion, the first portion coupled to the n-type region and the second portion coupled to the p-type region;   a plurality of conductive stacks, a first surface of each of the conductive stacks contacting a surface of the metal layer opposite the semiconductor structure, a respective gap positioned between each of the conductive stacks; and   a body in direct contact with a second surface of each of the conductive stacks that is opposite the first surface.   
     
     
         2 . The device of  claim 1 , wherein the insulating material completely covers all exposed surfaces of the semiconductor structure. 
     
     
         3 . The device of  claim 1 , wherein the metal layer is bonded to the plurality of conductive stacks. 
     
     
         4 . The device of  claim 1 , wherein the body includes a plurality of vias formed therein, each of the plurality of vias aligned with one of the plurality of conductive stacks. 
     
     
         5 . The device of  claim 4 , wherein each of the vias is lined with a conductive material that also lines an outer surface of the body that is not adjacent the plurality of conductive stacks. 
     
     
         6 . The device of  claim 5 , wherein the conductive material that lines each of the vias is coupled to a respective one of the plurality of conductive stacks. 
     
     
         7 . The device of  claim 1 , wherein each of the conductive stacks comprises a stack of a plurality of different conductive materials. 
     
     
         8 . The device of  claim 1 , wherein each of the conductive stacks comprises successive layers of copper, nickel and gold. 
     
     
         9 . The device of  claim 1 , wherein the gaps between the conductive stacks are filled with ambient gas. 
     
     
         10 . The device of  claim 1 , wherein the conductive stacks and the first and second portions of the metal layer all have the same shape. 
     
     
         11 . The device of  claim 1 , wherein the conductive stacks and the first and second portions of the metal layer have different shapes. 
     
     
         12 . The device of  claim 1 , wherein opposing conductive stacks and first or second portions of the metal layer are not precisely aligned.

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