Solar cell and method of manufacturing the same
Abstract
Disclosed is a solar cell including: a semiconductor substrate; a first conductive region formed at a first surface of the semiconductor substrate and having a first conductivity type; a second conductive region formed on a second surface of the semiconductor substrate opposite to the first surface, and having a second conductivity type opposite to the first conductivity type, wherein the second conductive region including a semiconductor layer different and separated from the semiconductor substrate; a first electrode electrically connected to the first conductive region; and a second electrode electrically connected to the second conductive region. The second surface of the semiconductor substrate has a rounded uneven member having a rounded end portion.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A solar cell, comprising:
a semiconductor substrate; a first conductive region formed at a first surface of the semiconductor substrate and having a first conductivity type; a second conductive region formed on a second surface of the semiconductor substrate opposite to the first surface, and having a second conductivity type opposite to the first conductivity type, wherein the second conductive region comprises a semiconductor layer different and separated from the semiconductor substrate; a first electrode electrically connected to the first conductive region; and a second electrode electrically connected to the second conductive region, wherein the second surface of the semiconductor substrate has a rounded uneven member having a rounded end portion.
2 . The solar cell of claim 1 , wherein the rounded uneven member has a pyramid shape including a rounded peak portion and a rounded valley portion.
3 . The solar cell of claim 1 , wherein the first surface of the semiconductor substrate has an uneven portion having a shape different from a shape of the rounded uneven member.
4 . The solar cell of claim 3 , wherein the uneven portion formed at the first surface of the semiconductor substrate comprises:
a first uneven member having a pyramid shape including a pointed peak portion and a pointed valley portion; or a second uneven member having a size smaller than a size of the rounded uneven member; or the first uneven member and a second uneven member formed at an outer surface of the first uneven member and having a size smaller than a size of the first uneven member.
5 . The solar cell of claim 1 , further comprising:
a control passivation layer positioned between the second surface of the semiconductor substrate and the second conductive region.
6 . The solar cell of claim 1 , wherein an average height of the rounded uneven member is larger than a thickness of the second conductive region.
7 . The solar cell of claim 6 , wherein the average height of the rounded uneven member is approximately 1 to 20 μm, and
wherein the thickness of the second conductive region is approximately 500 nm or less.
8 . The solar cell of claim 6 , wherein the second conductive region has an uneven portion corresponding to the rounded uneven member.
9 . The solar cell of claim 6 , wherein an uneven portion corresponding to the rounded uneven member is formed at an interface between the second conductive region and the second electrode.
10 . The solar cell of claim 1 , wherein reflectance of the second surface of the semiconductor substrate for visible light is 15% to 30% of incident light.
11 . The solar cell of claim 1 , wherein the semiconductor substrate comprises a base region having the second conductivity type,
wherein the first conductive region constitutes an emitter region, and wherein the second conductive region constitutes a surface field region.
12 . The solar cell of claim 1 , wherein the first conductive region comprises a doped region constituting a part of the semiconductor substrate.
13 . A method of manufacturing a solar cell, the method comprising:
forming a rounded uneven member having a rounded end portion at a second surface of a semiconductor substrate having a first surface and the second surface opposite to each other; forming conductive regions comprising forming a first conductive region at the first surface of the semiconductor substrate and forming a second conductive region on the second surface of the semiconductor substrate, wherein the second conductive region comprises a semiconductor layer different and separated from the semiconductor substrate; and forming electrodes comprising forming a first electrode electrically connected to the first conductive region and forming a second electrode electrically connected to the second conductive region.
14 . The method of claim 13 , wherein the forming of the rounded uneven member comprises:
forming a first uneven member at the second surface of the semiconductor substrate by a texturing process; and rounding an end portion of the first uneven member formed at the second surface of the semiconductor substrate to form the rounded uneven member at the second surface.
15 . The method of claim 14 , wherein the first uneven member has a pyramid shape including a pointed peak portion and a pointed valley portion.
16 . The method of claim 14 , wherein the rounding of the end portion is performed by using ozone.
17 . The method of claim 16 , wherein the rounding of the end portion is performed by a dipping process, and
wherein, in the dipping process, the semiconductor substrate is dipped in an etching solution.
18 . The method of claim 17 , wherein the etching solution is formed by dissolving the ozone in a diluted hydrofluoric acid or hydrogen peroxide solution.
19 . The method of claim 14 , further comprising:
forming a control passivation layer on the second surface of the semiconductor substrate between the rounding of the end portion and the forming of the conductive regions, wherein the forming of the control passivation layer is performed by a dipping process.
20 . The method of claim 14 , further comprising:
after the rounding of the end portion, performing a reactive ion etching process to the first surface of the semiconductor substrate to form a second uneven member.Join the waitlist — get patent alerts
Track US2018315866A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.