Semiconductor Device and Transistor Cell Having a Diode Region

Abstract

A semiconductor device includes a gate trench formed in a semiconductor body and having a first sidewall, a second sidewall opposite the first sidewall, and a bottom, a source region and a drift region of a first conductivity type formed in the semiconductor body, a body region of a second conductivity type arranged between the source region and the drift region and adjoining the first sidewall of the gate trench, and a diode region of the second conductivity type adjoining the second sidewall of the gate trench. A pn junction is formed between the diode region and the drift region and adjoins the bottom of the gate trench. The drift region has a locally increased doping concentration in a region between a pn junction at the border between the body region and the drift region and a lower end of the diode region.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor body;   a gate trench formed in the semiconductor body and having a first sidewall, a second sidewall opposite the first sidewall, and a bottom;   a source region and a drift region of a first conductivity type formed in the semiconductor body;   a body region of a second conductivity type arranged between the source region and the drift region and adjoining the first sidewall of the gate trench; and   a diode region of the second conductivity type adjoining the second sidewall of the gate trench,   wherein a pn junction is formed between the diode region and the drift region and adjoins the bottom of the gate trench,   wherein the drift region has a locally increased doping concentration in a region between a pn junction at the border between the body region and the drift region and a lower end of the diode region.   
     
     
         2 . The semiconductor device of  claim 1 , wherein a gate dielectric in the gate trench has a first thickness at the first sidewall and a second thickness at the second sidewall, and wherein the second thickness is greater than the first thickness. 
     
     
         3 . The semiconductor device of  claim 1 , wherein a gate dielectric in the gate trench has a first thickness at the first sidewall and a third thickness at the bottom, and wherein the third thickness is greater than the first thickness. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the gate trench has a rounded corner between the first sidewall and the bottom, and wherein a radius of the rounded corner is at least 2 times a thickness of a gate dielectric at the first sidewall. 
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a source electrode electrically connected to the source region and the diode region of each device cell.   
     
     
         6 . The semiconductor device of  claim 5 , wherein the diode region comprises:
 a first diode region forming the pn-junction with the drift region; and   a second diode region more highly doped than the first diode region and connected to the source electrode.   
     
     
         7 . The semiconductor device of  claim 6 , wherein the second diode region adjoins the second sidewall of the gate trench. 
     
     
         8 . The semiconductor device of  claim 6 , wherein the first diode region has a maximum doping concentration distant to the bottom of the gate trench. 
     
     
         9 . The semiconductor device of  claim 8 , wherein the first diode region has a local minimum of the doping concentration between a position of the maximum doping concentration and the bottom of the gate trench. 
     
     
         10 . The semiconductor device of  claim 1 , wherein the semiconductor body comprises a SiC crystal, and wherein the first sidewall of the gate trench is aligned with a c-axis of the SiC crystal. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the gate trench is formed in a first surface of the semiconductor body, and wherein an angle between the first surface of the semiconductor body and the first sidewall of the gate trench is between 80° and 89°. 
     
     
         12 . The semiconductor device of  claim 1 , wherein the region of the drift region with the locally increased doping concentration has a thickness in a range between 200 nanometers and 1 micrometer. 
     
     
         13 . The semiconductor device of  claim 1 , wherein the region of the drift region with the locally increased doping concentration has a doping concentration of at least 2 times greater than the doping concentration of the drift region outside the region with the locally increased doping concentration. 
     
     
         14 . The semiconductor device of  claim 1 , wherein the doping concentration of the region of the drift region with the locally increased doping concentration is in a range between 5E16 cm −3  and 1E17 cm −3 , and wherein the doping concentration of the drift region outside the region with the locally increased doping concentration is below 2E16 cm −3 . 
     
     
         15 . The semiconductor device of  claim 1 , wherein the semiconductor device is a depletion device, and wherein the body region includes a channel region which extends between the source region and the drift region along the first side all of the gate trench, and wherein the pn junction formed between the diode region and the drift region does not extend beyond the gate trench in a direction of the channel region. 
     
     
         16 . The semiconductor device of  claim 1 , further comprising neighboring device cells integrated in the semiconductor body, wherein diode regions of the neighboring device cells together with the drift region act as a JFET (Junction Field-Effect Transistor), wherein a region of the drift region between the diode regions of the neighboring device cells forms a channel region of the JFET, wherein the drift region has a locally increased doping concentration in the channel region of the JFET. 
     
     
         17 . The semiconductor device of  claim 16 , wherein the channel region of the JFET extends from a pn junction at the border between the body regions of the neighboring device cells and the drift region to a vertical position of a lower end of the diode regions of the neighboring device cells. 
     
     
         18 . The semiconductor device of  claim 16 , wherein the channel region of the JFET has a doping concentration of at least 2 times greater than a doping concentration of the drift region outside the channel region. 
     
     
         19 . The semiconductor device of  claim 16 , wherein the channel region of the JFET has a doping concentration in a range between 5E16 cm −3  and 1E17 cm −3 , and wherein a doping concentration of the drift region outside the channel region of the JFET is below 2E16 cm −3 . 
     
     
         20 . The semiconductor device of  claim 16 , wherein the diode region of each neighboring device cell comprises:
 a first diode region forming the pn-junction with the drift region; and   a second diode region more highly doped than the first diode region and connected to a source electrode.