Semiconductor device package and method for fabricating the same
Abstract
A semiconductor device package includes a first semiconductor package, a second semiconductor package, and an interposer between the first and second semiconductor packages. The first semiconductor package includes a first semiconductor package substrate and a first semiconductor chip. The second semiconductor package includes a second semiconductor package substrate and a second semiconductor chip. The interposer electrically connects the first semiconductor package to the second semiconductor package and includes a first interposer hole passing through the interposer. The first semiconductor chip includes a second portion which protrudes from a first portion, and the first portion is inserted into the first interposer hole.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device package, comprising:
a first semiconductor package including a first semiconductor package substrate and a first semiconductor chip; a second semiconductor package including a second semiconductor package substrate and a second semiconductor chip; and an interposer between the first semiconductor package and the second semiconductor package to electrically connect the first semiconductor package to the second semiconductor package, wherein the interposer includes a first interposer hole passing through the interposer and wherein the first semiconductor chip includes a first portion and a second portion which protrudes from the first portion and which is inserted into the first interposer hole.
2 . The semiconductor device package as claimed in claim 1 , wherein:
the interposer includes a connector on the interposer, a width of the first portion is larger than a width of the second portion, and a part of the first portion overlaps the connector.
3 . The semiconductor device package as claimed in claim 1 , wherein:
the second semiconductor package is on the first semiconductor package, and the first portion is between the second portion and the first semiconductor package substrate.
4 . The semiconductor device package as claimed in claim 1 , wherein:
the first semiconductor package is on the second semiconductor package, the first semiconductor package substrate includes a first substrate hole passing through the first semiconductor package substrate, the second portion is inserted into the first interposer hole through the first substrate hole, and the second portion is between the first portion and the second semiconductor chip.
5 . The semiconductor device package as claimed in claim 1 , wherein:
the second semiconductor package is on the first semiconductor package, the second semiconductor package substrate includes a second substrate hole passing through at least a part of the second semiconductor package substrate, the second portion of the first semiconductor chip includes a portion to be inserted into the first interposer hole and a portion to be inserted into the second substrate hole, and the portion to be inserted into the first interposer hole and the portion to be inserted into the second substrate hole are between the first portion and the second semiconductor chip.
6 . The semiconductor device package as claimed in claim 1 , wherein:
the second semiconductor package is on the first semiconductor package, the second semiconductor package substrate includes a second substrate hole passing through the second semiconductor package substrate, the second semiconductor chip includes a third portion and a fourth portion which protrudes from the third portion and is inserted into the second substrate hole, a width of the third portion is larger than a width of the fourth portion, and the second portion is between the fourth portion and the first portion.
7 . The semiconductor device package as claimed in claim 1 , wherein:
the first semiconductor package includes a third semiconductor chip spaced apart from the first semiconductor chip, and a part of the third semiconductor chip is not inserted into the interposer.
8 . The semiconductor device package as claimed in claim 7 , wherein:
the first semiconductor package substrate includes a first cavity and a second cavity spaced apart from the first cavity, the first portion is in the first cavity, the third semiconductor chip is in the second cavity, and a part of the third semiconductor chip is not inserted into the interposer.
9 . The semiconductor device package as claimed in claim 1 , further comprising:
a third semiconductor package including a third semiconductor package substrate and a fourth semiconductor chip, the third semiconductor package shares the interposer with the first and second semiconductor packages, and a part of the fourth semiconductor chip is not inserted into the interposer.
10 . The semiconductor device package as claimed in claim 1 , wherein:
a width of the first portion is larger than a width of the second portion, the first semiconductor chip includes a third portion spaced apart from the second portion and protruding from the first portion, a width of the third portion is less than a width of the first portion, the interposer includes a second interposer hole spaced apart from the first interposer hole and passes through the interposer, and the third portion is inserted into the second interposer hole.
11 . A semiconductor device package, comprising:
a first semiconductor package including a first semiconductor package substrate and a first semiconductor chip including a first portion and a second portion protruding from the first portion; a second semiconductor package including a second semiconductor package substrate and a second semiconductor chip; an interposer between the first semiconductor package and the second semiconductor package, the interposer including a first interposer hole exposing the second portion, the interposer including a first surface facing a second surface; and a connector on the first surface of the interposer, wherein a width of the first portion is larger than a width of the second portion and wherein a part of the first portion overlaps the connector.
12 . The semiconductor device package as claimed in claim 11 , wherein:
the second semiconductor package is on the first semiconductor package, and the connector is between the first surface of the interposer and the second semiconductor package substrate.
13 . The semiconductor device package as claimed in claim 12 , wherein at least a part of the second portion is inserted into the second semiconductor package substrate.
14 . The semiconductor device package as claimed in claim 12 , wherein:
the second semiconductor chip includes a third portion and a fourth portion protruding from the third portion, a width of the third portion is larger than a width of the fourth portion, at least a part of the fourth portion is inserted into the second semiconductor package substrate, and a part of the third portion overlaps the connector and the first portion.
15 . The semiconductor device package as claimed in claim 11 , wherein:
the first semiconductor package is on the second semiconductor package, the first semiconductor package substrate includes a first substrate hole passing through the first semiconductor package substrate, the connector is between the first surface of the interposer and the first semiconductor package substrate, and the second portion is exposed through the first substrate hole and the first interposer hole.
16 . An apparatus, comprising:
a first semiconductor package; a second semiconductor package; and an interposer to electrically connect the first semiconductor package to the second semiconductor package, wherein the interposer includes a hole and wherein a first portion of a semiconductor chip in the first semiconductor package is in the hole and extends in a direction of the second semiconductor package.
17 . The apparatus as claimed in claim 16 , wherein the second semiconductor package overlaps the first semiconductor package.
18 . The apparatus as claimed in claim 16 , wherein:
the semiconductor chip includes a second portion, and the second portion of the semiconductor chip overlaps a surface of the interposer.
19 . The apparatus as claimed in claim 16 , wherein the interposer includes a connector to establish electrical contact with the first semiconductor package or the second semiconductor package.
20 . The apparatus as claimed in claim 16 , wherein:
the interposer has a first width, the first semiconductor package has a second width, and the second width is greater than the first width.Join the waitlist — get patent alerts
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