Semiconductor device and method of manufacturing semiconductor device
Abstract
A semiconductor device includes a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an IGBT arranged therein, and a withstand-voltage retention region surrounding the first region and the second regions in plan view are defined. The semiconductor substrate has a first main surface and a second main surface. The semiconductor substrate includes an anode layer having a first conductivity type, which is arranged in the first main surface of the first region, and a diffusion layer having the first conductivity type, which is arranged in the first main surface of the withstand-voltage retention region adjacently to the anode layer. A first trench is arranged in the first main surface on a side of the anode layer with respect to a boundary between the anode layer and the diffusion layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device, comprising:
a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an insulated gate bipolar transistor (IGBT) arranged therein, and a withstand-voltage retention region surrounding said first region and said second regions in plan view are defined, said semiconductor substrate having a first main surface and a second main surface; a surface electrode arranged on said first main surface of said first region, of said second regions, and of said withstand-voltage retention region; and a back-surface electrode arranged on said second main surface of said first region, of said second regions, and of said withstand-voltage retention region, said semiconductor substrate further comprising:
an anode layer having a first conductivity type, which is arranged in said first main surface of said first region;
a diffusion layer having said first conductivity type, which is arranged in said first main surface of said withstand-voltage retention region adjacently to said anode layer; and
a cathode layer having a second conductivity type, which is arranged in said second main surface of said first region,
wherein a first trench is arranged in said first main surface on a side of said anode layer with respect to a boundary between said anode layer and said diffusion layer.
2 . The semiconductor device according to claim 1 , wherein a second trench crossing with said first trench is arranged in said anode layer.
3 . A semiconductor device, comprising:
a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an insulated gate bipolar transistor (IGBT) arranged therein, and a withstand-voltage retention region surrounding said first region and said second regions in plan view are defined, said semiconductor substrate having a first main surface and a second main surface; a surface electrode arranged on said first main surface of said first region and of said second regions; and a back-surface electrode arranged on said second main surface of said first region, of said second regions, and of said withstand-voltage retention region, said semiconductor substrate further comprising:
an anode layer having a first conductivity type, which is arranged in said first main surface of said first region;
a diffusion layer having said first conductivity type, which is arranged in said first main surface of said withstand-voltage retention region adjacently to said anode layer; and
a cathode layer having a second conductivity type, which is arranged in said second main surface of said first region,
wherein said surface electrode is out of contact with said diffusion layer.
4 . A method of manufacturing a semiconductor device, said semiconductor device comprising:
a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an insulated gate bipolar transistor (IGBT) arranged therein, and a withstand-voltage retention region surrounding said first region and said second regions in plan view are defined, said semiconductor substrate having a first main surface and a second main surface; a surface electrode arranged on said first main surface of said first region, of said second regions, of and said withstand-voltage retention region; and a back-surface electrode arranged on said second main surface of said first region, said of second regions, and of said withstand-voltage retention region, said semiconductor substrate further comprising:
an anode layer having a first conductivity type, which is arranged in said first main surface of said first region;
a diffusion layer having said first conductivity type, which is arranged in said first main surface of said withstand-voltage retention region adjacently to said anode layer; and
a cathode layer having a second conductivity type, which is arranged in said second main surface of said first region,
the method comprising forming said diffusion layer in such a manner that impurity is selectively injected within a region in which said diffusion layer is to be formed.Join the waitlist — get patent alerts
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