US2018302990A1PendingUtilityA1
Molded Circuit Substrates
Assignee: HEPTAGON MICRO OPTICS PTE LTDPriority: Oct 7, 2015Filed: Oct 7, 2016Published: Oct 18, 2018
Est. expiryOct 7, 2035(~9.2 yrs left)· nominal 20-yr term from priority
H05K 3/28H10W 74/00H10W 72/0198H05K 1/0284H05K 3/0014H05K 3/0097H05K 2201/09118H01L 2224/48091H01L 2924/181H01L 33/58H01L 2224/97H01L 27/14618H01L 2933/0033H01L 33/486H10H 20/855H10H 20/8506H10H 20/857H10H 20/036H10F 39/804
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Claims
Abstract
Molded circuit substrates include a conductive layer surrounded by an insulating sidewall. The insulating sidewall further provides a structural component for an electronic module into which the molded circuit substrate is incorporated. Accordingly, the molded circuit substrates can permit better performance, reduce electronic module thickness, and reduce fabrication costs. Methods for fabricating molded circuit substrates can facilitate precise positioning of insulating sidewalls, insulating partitions, electrical contacts and other components.
Claims
exact text as granted — not AI-modified1 . A molded circuit substrate comprising:
an insulating sidewall and a conductive layer, the conductive layer being surrounded by the insulating sidewall, the insulating sidewall delineating an electrically isolated region of the conductive layer; and the insulating sidewall further delineating a structural component within an electronic module.
2 . The molded circuit substrate of claim 1 , the structural component delineating non-transparent sidewalls in an optoelectronic module.
3 . The molded circuit substrate of claim 2 , the structural component delineating lateral dimensions of a transparent overmold.
4 . The molded circuit substrate of claim 3 , wherein the transparent overmold includes an optical element.
5 . The molded circuit substrate of claim 3 , wherein the transparent overmold includes an optical filter.
6 . The molded circuit substrate of claim 2 , wherein the molded circuit substrate further includes an active optoelectronic component mounted on a surface of the conductive layer.
7 . The molded circuit substrate of claim 6 , wherein the active optoelectronic Component includes at least one of the following: a laser diode, a light-emitting diode, a photodiode, an array of laser diodes, an array of light-emitting diodes, or an array of photodiodes.
8 . The molded circuit substrate of claim 2 , the molded circuit substrate further including an optical element, the structural component further delineating a substrate on which the optical element is mounted.
9 . The molded circuit substrate of claim 8 , the structural component further delineating a separation between the optical element and the conductive layer.
10 . The molded circuit substrate of claim 1 further comprising an insulating partition, the insulating partition delineating an electrically isolated region of the conductive layer
11 . A method for manufacturing a plurality of molded circuit substrates, the method
comprising:
mounting a conductive layer to an etch-resistant substrate;
applying a photoresist to the conductive layer;
selectively curing the photoresist on the conductive layer to form a pattern delineating the lateral dimensions of a plurality of insulating sidewalls;
removing the photoresist from the conductive layer such that the removed photoresist defines the lateral dimensions of the insulating sidewalls;
etching the conductive layer;
stripping the cured photoresist from the conductive layer;
mounting a sidewall tool to the conductive layer, the sidewall tool including cavities delineating a plurality of insulating sidewalls;
filling the cavities delineating the plurality of insulating sidewalls with non-transparent moldable material;
curing the non-transparent moldable material;
removing the sidewall tool from the conductive layer and the cured non-transparent moldable material, the cured moldable material being the plurality of insulating sidewalls;
plating the conductive layer; and
mounting a plurality of active components to the conductive layer.
12 . The method of claim 11 further comprising:
mounting an overmold tool to the plurality of insulating sidewalls, the overmold tool including cavities delineating a plurality of overmolds;
filling the cavities delineating the plurality of overmolds with transparent moldable
material;
curing the transparent moldable material; and
removing the overmold tool from the cured non-transparent and transparent moldable material.
13 . The method of claim 12 further comprising dicing through the insulating sidewalls.
14 . A method for manufacturing a plurality of molded circuit substrates, the method
comprising:
mounting a conductive layer to an etch-resistant substrate;
applying a photoresist to the conductive layer;
selectively curing the photoresist on the conductive layer to form a pattern delineating lateral dimensions of a plurality of insulating sidewalls;
removing the photoresist from the conductive layer such that the removed photoresist defines the lateral dimensions of the insulating sidewalls;
etching the conductive layer;
stripping the cured photoresist from the conductive layer;
mounting a flat tool to the conductive layer, the flat tool being substantially flat and delineating a plurality of insulating partition cavities;
filling the insulating partition cavities with non-transparent moldable material;
curing the non-transparent moldable material;
removing the flat tool from the conductive layer and the cured non-transparent moldable material, the cured moldable material being the plurality of insulating partition cavities;
mounting a sidewall tool to the conductive layer, the sidewall tool including cavities delineating a plurality of insulating sidewalls;
filling the cavities delineating the plurality of insulating sidewalls with non-transparent moldable material;
curing the non-transparent moldable material;
removing the sidewall tool from the conductive layer and the cured non-transparent moldable material, the cured moldable material being the plurality of insulating sidewalls;
plating the conductive layer; and
mounting a plurality of active components to the conductive layer.Join the waitlist — get patent alerts
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