Semiconductor device having compressively strained channel region and method of making same

Abstract

A semiconductor device and method making it utilize a three-dimensional channel region comprising a core of a first semiconductor material and an epitaxial covering of a second semiconductor material. The first and second semiconductor materials have respectively different lattice constants, thereby to create a strain in the epitaxial covering. The devices are formed by a gate-last process, so that the second semiconductor material is deposited only after the high temperature processes have been performed. Consequently, the lattice strain is not substantially relaxed, and the improved performance benefits of the lattice strained channel region are not compromised.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor substrate;   a protrusion part formed on the semiconductor substrate such that the protrusion part extends along a first direction;   a gate dielectric layer covering the protrusion part;   a gate electrode formed on the gate dielectric layer such that the gate electrode covers the protrusion part through the gate dielectric layer;   a source region formed next to a part covered with the gate electrode in the protrusion part; and   a drain region formed at a position opposed to the source region, the portion covered with the gate electrode sandwiched between the source region and the drain region in the protrusion part,   wherein the protrusion part comprising:   a first region composed of a first semiconductor material; and   a second region formed next to the first region, the second region composed of a second semiconductor material having a lattice constant different from a lattice constant of the first semiconductor material, and   wherein the second region is formed between the source region and the drain region in a first cross-sectional view through the source region, the drain region and the gate electrode.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the semiconductor substrate is comprised of the first semiconductor material, and   wherein the first region is formed integrally with the semiconductor substrate.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein the semiconductor substrate is a SOI substrate comprising a substrate, an insulating layer formed on the substrate and a semiconductor layer formed on the insulating layer. 
     
     
         4 . The semiconductor device according to  claim 3 , wherein the source region, the drain region and the gate electrode are electrically separated from the substrate, respectively. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the lattice constant of the second semiconductor material is greater than the lattice constant of the first semiconductor material. 
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the first semiconductor material comprises silicon, and   wherein the first semiconductor material comprises silicon and germanium.   
     
     
         7 . The semiconductor device according to  claim 1 ,
 wherein the lattice constant of the second semiconductor material is smaller than the lattice constant of the first semiconductor material.   
     
     
         8 . The semiconductor device according to  claim 7 ,
 wherein the first semiconductor material comprises silicon and germanium, and   wherein the first semiconductor material comprises silicon.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein the gate dielectric layer further covers a side surface of the gate electrode in the first cross-sectional view. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the second region is epitaxial film. 
     
     
         11 . The semiconductor device according to  claim 1 , wherein the second region covers the first region in a second cross-sectional view perpendicular to the first direction and through the gate electrode. 
     
     
         12 . The semiconductor device according to  claim 1 , wherein the gate electrode extends along a second direction perpendicular to the first direction in plan view. 
     
     
         13 . A method of manufacturing a semiconductor device, comprising;
 forming an intermediate transistor; the intermediate transistor comprising;
 a semiconductor substrate; 
 a core region formed on the semiconductor substrate such that the core region extends along a first direction, the core region comprised of a first semiconductor material; 
 a dummy gate covering the core region; 
 a source region formed next to a part covered with the dummy gate in the core region; and 
 a drain region formed at a position opposed to the source region, the portion covered with the gate electrode sandwiched between the source region and the drain region in the core region, 
   removing the dummy gate from the intermediate transistor to expose a part of the core region;   forming an epitaxial film on a part of the core region, the epitaxial film composed of a second semiconductor material having a lattice constant different from a lattice constant of the first semiconductor material;   forming a gate dielectric layer so as to cover the core region through the epitaxial film, and   forming a gate electrode so as to cover the core region through the gate dielectric layer.   
     
     
         14 . The method according to  claim 13 , wherein the core region and the epitaxial film constitute a protrusion part protruding from the semiconductor substrate. 
     
     
         15 . The method according to  claim 13 , wherein a step of the forming the intermediate transistor comprises a step of activating the source region and the drain region by heat treatment. 
     
     
         16 . The method according to  claim 13 ,
 wherein the core region is formed on a sacrificial layer, and   wherein the method further comprising:   removing the sacrificial layer to make space positioned bellow the core region; and   burying a dielectric material in the space before the removing the sacrificial layer.   
     
     
         17 . The method according to  claim 13 ,
 wherein the first semiconductor material comprises silicon, and   wherein the first semiconductor material comprises silicon and germanium.   
     
     
         18 . The method according to  claim 13 ,
 wherein the first semiconductor material comprises silicon and germanium, and   wherein the first semiconductor material comprises silicon.   
     
     
         19 . The method according to  claim 13 ,
 wherein the epitaxial film covers in a second cross-sectional view perpendicular to the first direction and through the gate electrode.