US2018294195A1PendingUtilityA1

Semiconductor device and method of manufacturing the semiconductor device

Assignee: FUJITSU SEMICONDUCTOR LTDPriority: Mar 27, 2007Filed: Jun 8, 2018Published: Oct 11, 2018
Est. expiryMar 27, 2027(~0.7 yrs left)· nominal 20-yr term from priority
H10D 64/01306H10D 30/608H01L 29/7834H01L 21/823807H01L 29/7848H01L 29/7845H01L 29/4925H01L 21/823842H01L 29/7833H01L 21/28035H01L 29/66636H10D 30/601H10D 84/0167H10D 64/662H10D 62/021H10D 30/797H10D 30/794H10D 84/0177H10D 84/038
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Claims

Abstract

A semiconductor device includes a transistor configuration including first and second gate electrodes, each of the first and second gate electrodes having at least a bottom layer and an upper layer including polycrystalline silicon grains, wherein the first gate electrode is a nMOS gate electrode formed in an nMOS region of the transistor configuration, wherein the polycrystalline silicon grains included in the bottom layer of the first gate electrode have a greater particle diameter than the polycrystalline grains included in the upper layer of the second gate electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device comprising:
 forming a first amorphous silicon film on a semiconductor substrate;   implanting an impurity to the first amorphous silicon film in an nMOS region of the semiconductor substrate;   forming a second amorphous silicon film on top of the first amorphous silicon film;   patterning the first and second amorphous silicon films to form a first gate electrode in the nMOS region and a second gate electrode in a pMOS region;   polycrystallizing the first and second amorphous silicon films by performing a thermal process after the forming of the first and second gate electrodes,   wherein grains generated by the polycrystallizing in the first amorphous silicon film of the first gate electrode have a greater particle diameter than grains generated by the polycrystallizing in the second amorphous silicon film of the first gate electrode and grains generated by the polycrystallizing in the first amorphous silicon film of the second gate electrode.   
     
     
         2 . The method of manufacturing a semiconductor device as claimed in  claim 1 , wherein the first amorphous silicon film of the first gate electrode applies compressive stress to a first channel region immediately below the first gate electrode, the compressive stress existing in the first channel region is in a direction vertical to a surface of the semiconductor substrate. 
     
     
         3 . The method of manufacturing a semiconductor device as claimed in  claim 1 , wherein the grains in the first amorphous silicon film of the first gate electrode have a greater particle diameter than grains generated by the polycrystallizing in the second amorphous silicon film of the second gate electrode. 
     
     
         4 . The method of manufacturing a semiconductor device as claimed in  claim 1 , wherein the impurity includes at least one of P, Ge, and Si. 
     
     
         5 . The method of manufacturing a semiconductor device as claimed in  claim 1 , further comprising:
 forming sidewall spacers at the sides of the first and second gate electrodes;   wherein the thermal process is performed by using heat generated when performing the forming of the sidewall spacers.

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