Package stack structure and method for manufacturing the same

Abstract

The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.

What is claimed is: 
     
         1 . A package stack structure, comprising:
 a first unit including an insulating layer, a circuit portion and a plurality of conductive elements, wherein the insulating layer includes a first surface and a second surface opposite to the first surface, the circuit portion is combined with the insulating layer, the conductive elements are disposed vertically on the first surface of the insulating layer and in contact with the circuit portion, and the first unit includes no core layer;   a board stacked on the first surface of the insulating layer via the conductive elements; and   a first electronic component provided on the board.   
     
     
         2 . The package stack structure of  claim 1 , wherein the circuit portion includes at least one circuit layer. 
     
     
         3 . The package stack structure of  claim 1 , wherein the circuit portion has an outer surface lower than the second surface of the insulating layer. 
     
     
         4 . The package stack structure of  claim 1 , wherein the conductive elements are solder balls, copper core balls or metallic parts. 
     
     
         5 . The package stack structure of  claim 1 , further comprising a second electronic component provided on the second surface of the insulating layer. 
     
     
         6 . The package stack structure of  claim 1 , further comprising an encapsulant formed between the first surface of the insulating layer and the board. 
     
     
         7 . The package stack structure of  claim 1 , further comprising a support portion combined on the second surface of the insulating layer. 
     
     
         8 . The package stack structure of  claim 7 , wherein the support portion includes at least one metal layer, and is combined with the second surface of the insulating layer via the metal layer. 
     
     
         9 . The package stack structure of  claim 7 , wherein the support portion includes a plurality of metal layers and a plurality of isolation layers, and is combined with the second surface of the insulating layer via the metal layers. 
     
     
         10 . The package stack structure of  claim 1 , wherein the circuit portion is embedded in the insulating layer. 
     
     
         11 . A method for manufacturing a package stack structure, comprising:
 providing a first unit including an insulating layer, a circuit portion, a support portion and a plurality of conductive elements, wherein the insulating layer includes a first surface and a second surface opposite to the first surface, the circuit portion is combined with the insulating layer, the conductive elements are disposed vertically on the first surface of the insulating layer and in contact with the circuit portion, and the insulating layer is combined with the support portion via the second surface of the insulating layer;   disposing the first unit on a second unit, wherein the second unit includes a board and a first electronic component provided on the board, and the insulating layer, the circuit portion and the support portion are stacked on the board via the conductive elements; and   removing the support portion after disposing the first unit on the second unit.   
     
     
         12 . The method of  claim 11 , wherein the support portion includes at least one metal layer, and is combined with the second surface of the insulating layer via the metal layer. 
     
     
         13 . The method of  claim 11 , wherein the support portion includes a plurality of metal layers and a plurality of isolation layers, and is combined with the second surface of the insulating layer via the metal layers. 
     
     
         14 . The method of  claim 11 , wherein the circuit portion includes at least one circuit layer. 
     
     
         15 . The method of  claim 11 , wherein after removing the support portion, the circuit portion has an outer surface exposed from the second surface of the insulating layer. 
     
     
         16 . The method of  claim 15 , wherein the outer surface of the circuit portion is lower than the second surface of the insulating layer. 
     
     
         17 . The method of  claim 11 , wherein the conductive elements are solder balls, copper core balls or metallic parts. 
     
     
         18 . The method of  claim 11 , further comprising disposing a second electronic component on the second surface of the insulating layer. 
     
     
         19 . The method of  claim 11 , further comprising forming an encapsulant between the first surface of the insulating layer and the board. 
     
     
         20 . The method of  claim 11 , wherein the circuit portion is embedded in the insulating layer.