US2018260230A1PendingUtilityA1
Managing a divided load reorder queue
Est. expiryJun 27, 2036(~9.9 yrs left)· nominal 20-yr term from priority
Inventors:Richard J. EickemeyerDavid A. HruseckyElizabeth A. McgloneBrian W. ThomptoAlbert J. Van Norstrand, Jr.
G06F 9/3855G06F 9/3824G06F 9/3854G06F 9/3856G06F 9/3858
56
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Claims
Abstract
Managing a divided load reorder queue including storing load instruction data for a load instruction in an expanded LRQ entry in the LRQ; launching the load instruction from the expanded LRQ entry; determining that the load instruction is in a finished state; moving a subset of the load instruction data from the expanded LRQ entry to a compact LRQ entry in the LRQ, wherein the compact LRQ entry is smaller than the expanded LRQ entry; and removing the load instruction data from the expanded LRQ entry.
Claims
exact text as granted — not AI-modified1 . A method of managing a divided load reorder queue (LRQ), the method comprising:
determining that a load instruction is in a finished state; and moving a subset of load instruction data from an expanded LRQ entry in the LRQ to a compact LRQ entry in the LRQ, wherein the compact LRQ entry is smaller than the expanded LRQ entry.
2 . The method of claim 1 , further comprising:
determining that the load instruction is in a completed state; and removing the subset of the load instruction data from the compact LRQ entry in the LRQ.
3 . The method of claim 1 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
determining that at least one compact LRQ entry is available to store the subset of the load instruction data.
4 . The method of claim 1 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
moving the load instruction data from the expanded LRQ entry to a staging area; extracting the subset of the load instruction data from the load instruction data; and storing the extracted subset of the load instruction data in the compact LRQ entry in the LRQ.
5 . The method of claim 1 , wherein the expanded LRQ entry is one of a plurality of expanded LRQ entries in the LRQ, and wherein the compact LRQ entry is one of a plurality of compact LRQ entries in the LRQ.
6 . The method of claim 1 , wherein the subset of the load instruction data comprises a hash of a portion of the load instruction data.
7 . The method of claim 1 , wherein a size of the compact LRQ entry is less than half of a size of the expanded LRQ entry.
8 . A multi-slice processor configured to carry out:
determining that a load instruction is in a finished state; and moving a subset of load instruction data from an expanded LRQ entry in the LRQ to a compact LRQ entry in the LRQ, wherein the compact LRQ entry is smaller than the expanded LRQ entry.
9 . The multi-slice processor of claim 8 , further configured to carry out:
determining that the load instruction is in a completed state; and removing the subset of the load instruction data from the compact LRQ entry in the LRQ.
10 . The multi-slice processor of claim 8 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
determining that at least one compact LRQ entry is available to store the subset of the load instruction data.
11 . The multi-slice processor of claim 8 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
moving the load instruction data from the expanded LRQ entry to a staging area; extracting the subset of the load instruction data from the load instruction data; and storing the extracted subset of the load instruction data in the compact LRQ entry in the LRQ.
12 . The multi-slice processor of claim 8 , wherein the expanded LRQ entry is one of a plurality of expanded LRQ entries in the LRQ, and wherein the compact LRQ entry is one of a plurality of compact LRQ entries in the LRQ.
13 . The multi-slice processor of claim 8 , wherein the subset of the load instruction data comprises a hash of a portion of the load instruction data.
14 . The multi-slice processor of claim 8 , wherein a size of the compact LRQ entry is less than half of a size of the expanded LRQ entry.
15 . An apparatus comprising a multi-slice processor configured to carry out:
determining that a load instruction is in a finished state; and moving a subset of load instruction data from an expanded LRQ entry in the LRQ to a compact LRQ entry in the LRQ, wherein the compact LRQ entry is smaller than the expanded LRQ entry.
16 . The apparatus of claim 15 , where in the multi-slice processor is further configured to carry out:
determining that the load instruction is in a completed state; and removing the subset of the load instruction data from the compact LRQ entry in the LRQ.
17 . The apparatus of claim 15 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
determining that at least one compact LRQ entry is available to store the subset of the load instruction data.
18 . The apparatus of claim 15 , wherein moving the subset of the load instruction data from the expanded LRQ entry to the compact LRQ entry in the LRQ comprises:
moving the load instruction data from the expanded LRQ entry to a staging area; extracting the subset of the load instruction data from the load instruction data; and storing the extracted subset of the load instruction data in the compact LRQ entry in the LRQ.
19 . The apparatus of claim 15 , wherein the expanded LRQ entry is one of a plurality of expanded LRQ entries in the LRQ, and wherein the compact LRQ entry is one of a plurality of compact LRQ entries in the LRQ.
20 . The apparatus of claim 15 , wherein the subset of the load instruction data comprises a hash of a portion of the load instruction data.Join the waitlist — get patent alerts
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