US2018245240A1PendingUtilityA1

Method for producing semiconductor epitaxial wafer and semiconductor epitaxial wafer

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Assignee: SHINETSU HANDOTAI KKPriority: Mar 5, 2014Filed: Feb 22, 2018Published: Aug 30, 2018
Est. expiryMar 5, 2034(~7.6 yrs left)· nominal 20-yr term from priority
Inventors:Kazunori HagimotoMasaru ShinomiyaKeitaro TsuchiyaHirokazu GotoKen SatoHiroshi ShikauchiShoichi KobayashiHirotaka Kurimoto
H10P 95/11H10P 90/129H10P 90/128H10P 90/126H10P 90/123H10P 74/203H10P 74/23H10P 14/3416H10P 14/3216H10P 14/2905H10P 14/2904H10P 14/24H01L 21/02013H01L 21/02024H01L 21/02458H01L 21/7806H01L 21/0254H01L 21/0262C30B 25/00H01L 22/12C30B 25/183C30B 29/406H01L 21/02019C30B 33/00H01L 21/02381C30B 33/10H01L 21/02378C23C 16/34H01L 29/2003H01L 22/20H01L 21/02021H01L 29/32C23C 16/56H10D 62/8503H10D 62/53
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Claims

Abstract

A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.

Claims

exact text as granted — not AI-modified
1 . A semiconductor epitaxial wafer in which a semiconductor layer is, epitaxially grown on a silicon-based substrate, wherein
 at an outer edge portion of the semiconductor epitaxial wafer, at least part of the semiconductor layer is removed.   
     
     
         2 . The semiconductor epitaxial wafer according to  claim 1 , wherein
 surface of a region where at least part of the semiconductor layer is removed, is a mirror surface or a quasi-mirror surface.   
     
     
         3 . The semiconductor epitaxial wafer according to  claim 1 , wherein
 in a region where at least part of the semiconductor layer is removed, the silicon-based substrate is exposed.   
     
     
         4 . The semiconductor epitaxial wafer according to  claim 2 , wherein
 in a region where at least part of the semiconductor layer is removed, the silicon-based substrate is exposed.   
     
     
         5 . The semiconductor epitaxial wafer according to  claim 1 , wherein
 the semiconductor layer is composed of a nitride semiconductor.   
     
     
         6 . The semiconductor epitaxial wafer according to  claim 2 , wherein
 the semiconductor layer is composed of a nitride semiconductor.   
     
     
         7 . The semiconductor epitaxial wafer according to  claim 3 , wherein
 the semiconductor layer is composed of a nitride semiconductor.   
     
     
         8 . The semiconductor epitaxial wafer according to  claim 5 , wherein
 the nitride semiconductor is one or more than one of AlN, GaN, InN, and a mixed crystal thereof.

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