Semiconductor device and method of manufacturing same

Abstract

To provide a semiconductor device including a power semiconductor element having improved reliability. The semiconductor device has a cell region and a peripheral region formed outside the cell region. The n type impurity concentration of n type column regions in the cell region is made higher than that of n type column regions comprised of an epitaxial layer in the peripheral region. Further, a charge balance is kept in each of the cell region and the peripheral region and each total electric charge is set so that a total electric charge of first p type column regions and a total electric charge of n type column regions in the cell region become larger than a total electric charge of third p type column regions and n type column regions comprised of an epitaxial layer in the peripheral region, respectively.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device having a cell region and a peripheral region formed outside the cell region, comprising the following steps of:
 (a) providing a semiconductor substrate having on the main surface thereof a first epitaxial layer of a first conductivity type,   (b) introducing an impurity of the first conductivity type into the first epitaxial layer in the cell region by ion implantation to form a plurality of first column regions while separating the regions from each other in a first direction,   (c) after the step (b), introducing an impurity of a second conductivity type, which is a conductivity type different from the first conductivity type, into the first epitaxial layer in the cell region to form a plurality of second column regions in a partial region of the first epitaxial layer sandwiched between the first column regions adjacent to each other, and   (d) introducing an impurity of the second conductivity type into the first epitaxial layer in the peripheral region by ion implantation to form a plurality of third column regions while separating the regions from each other in the first direction,   wherein a concentration of the first conductivity type impurity of the first column regions in the cell region is higher than a concentration of an impurity of the first conductivity type of the first epitaxial layer in the peripheral region.   
     
     
         2 . The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein a width, in the first direction, of the second column regions in the cell region is equal to a width, in the first direction, of the third column regions in the peripheral region, and   wherein a concentration of the impurity of the second conductivity type of the second column regions in the cell region is higher than a concentration of the impurity of the second conductivity type of the third column regions in the peripheral region.   
     
     
         3 . The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the step (c) and the step (d) are carried out simultaneously; and   wherein the width, in the first direction, of the second column regions in the cell region is larger than the width, in the first direction, of the third column regions in the peripheral region.   
     
     
         4 . The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein in the step (b), an impurity of the first conductivity type is introduced so that a concentration of the impurity of the first conductivity type of the first column regions gradually increases in a direction extending from the upper surface to the lower surface of the first epitaxial layer; and   wherein in the step (c), the second conductivity type impurity is introduced so that the second conductivity type impurity concentration of the second column regions gradually decreases in a direction extending from the upper surface to the lower surface of the first epitaxial layer.   
     
     
         5 . The method of manufacturing a semiconductor device according to  claim 1 , further comprising the following steps after the step (d):
 (e) forming a second epitaxial layer of the first conductivity type over the upper surface of the first epitaxial layer extending from the cell region to the peripheral region,   (f) introducing an impurity of the first conductivity type into the second epitaxial layer in the cell region by ion implantation to form a plurality of fourth column regions having a first conductivity type impurity concentration higher than that of the second epitaxial layer and electrically coupled to the first column regions, respectively while separating the fourth column regions from each other in the first direction,   (g) after the step (f), introducing an impurity of the second conductivity type into the second epitaxial layer in the cell region by ion implantation to form a plurality of fifth column regions electrically coupled to the second column regions, respectively, in a partial region sandwiched by the fourth column regions adjacent to each other,   (h) introducing an impurity of the second conductivity type into the second epitaxial layer in the peripheral region by ion implantation to form a plurality of sixth column regions electrically coupled to the third column regions, respectively, while separating the sixth column regions from each other in the first direction, and   (i) carrying out a step similar to a step having the steps (e), (f), (g), and (h) in repetition.