Semiconductor device and method of forming the same
Abstract
A diode, UV radiation detector, and method of manufacturing semiconductor device that includes a diode with a substrate having a first side and a second side. The diode includes an active layer having a rocksalt phase crystalline structure of CaS disposed on the first side of the substrate, and an electrical contact disposed on the second side of the substrate. The diode also includes a semi-transparent conducting layer disposed on the active layer. The UV radiation detector includes the diode and circuitry connecting the semi-transparent conducting layer and the electrical contact. The UV radiation detector may detect radiation having a wavelength between 220 and 280 nm. The substrate may have a lattice mismatch between 0.47% and 12.6% with respect to the active layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A diode, the diode comprising:
a substrate having a first side and a second side, the first side and the second side being located on opposing faces of the substrate; an active layer comprising rocksalt phase crystalline structure CaS disposed on the first side of the substrate; an electrical contact disposed on the second side of the substrate; and a semi-transparent conducting layer disposed on the active layer.
2 . The diode of claim 1 , wherein the substrate has a lattice constant of 5.69 Å.
3 . The diode of claim 1 , the diode being a Schottky-barrier diode that is operated in a zero-bias mode.
4 . The diode of claim 1 , wherein active layer is between 20-50 nm thick.
5 . The diode of claim 3 , wherein an external quantum efficiency of the Schottky-barrier diode is at least 19% at a wavelength of 235 nm.
6 . The diode of claim 1 , wherein the substrate is a n + -GaAs substrate.
7 . The Schottky-barrier diode of claim 1 , wherein the semi-transparent conducting layer is a 10 nm thick layer of gold.
8 . A UV radiation detector comprising:
a diode, the diode comprising:
a substrate having a first side and a second side, the first side and the second side being located on opposing faces of the substrate;
an active layer comprising rocksalt phase crystalline structure CaS disposed on the first side of the substrate;
an electrical contact disposed on the second side of the substrate; and
a semi-transparent conducting layer disposed on the active layer; and
a circuit connecting the semi-transparent conducting layer and the electrical contact, wherein the UV radiation detector is configured to detect radiation having a wavelength between 220 and 280 nm.
9 . The UV radiation detector according to claim 8 , wherein the diode is a Schottky-barrier diode having an external quantum efficiency of at least 19% at a wavelength of 235 nm when operated in zero-bias mode.
10 . A method of manufacturing semiconductor device, the method comprising:
growing a binary molecular precursor layer on a substrate, the substrate heated to a first temperature, using molecular beam epitaxy on one side of a substrate, ramping the temperature of the substrate at a first rate to a second temperature while under the flux of the molecular beam epitaxy; holding the temperature of the substrate at the second temperature for a first period of time while under the flux of the molecular beam epitaxy; reducing the temperature of the substrate at a second rate to a third temperature while under the flux of the molecular beam epitaxy; and growing a second layer, the second layer being formed of the same binary molecular material as the precursor layer, on the binary molecular precursor layer for a second period of time to form an active layer including the first layer and second layer, wherein the substrate has a lattice mismatch between 0.47% and 12.6% with respect to the active layer.
11 . The method of claim 10 , wherein the binary molecular precursor layer is a CaS layer.
12 . The method of claim 11 , wherein Ca and S sources in the molecular beam epitaxy are maintained at 430° C. and 910° C. respectively.
13 . The method of claim 12 , wherein the binary molecular precursor layer is grown to a thickness of 5 nm.
14 . The method according to claim 13 , wherein the active layer is grown to a thickness of 20 nm.
15 . The method of claim 10 , further comprising:
disposing a semi-transparent conducting layer on the active layer; disposing an electrical contact on a side of substrate opposite to the active layer; and electrically connecting a circuit to the electrical contact and the semi-transparent conducting layer to a circuit.
16 . The method of claim 12 , wherein the first temperature is 180° C., the first rate is 50° C./min, the second temperature is 550° C., the first period of time is 30 minutes, the third temperature is 350° C., the second period of time is 30 minutes, and the second rate is −30° C./min.
17 . The method of claim 10 , wherein the binary molecular precursor layer is a CaTe layer.
18 . The method of claim 17 ,
wherein the first temperature is 200° C., the first rate is +50° C./min, the second temperature is 300° C., the first period of time is 30 minutes, the third temperature is 230° C., the second period of time is 30 minutes, and the second rate is −30° C./min, and wherein a source temperature of an elemental Ca source and a source temperature of an elemental Te source in the molecular beam epitaxy are 485° C. and 290° C., respectively.
19 . The method of claim 10 , wherein the first and second periods of time are determined by monitoring a crystalline quality of the binary molecular precursor layer and active layer using reflection high energy diffraction (RHEED).
20 . The method of claim 10 , wherein the active layer is grown to a thickness greater than 20 nm.Join the waitlist — get patent alerts
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