US2018190706A1PendingUtilityA1

Solid-state imaging device

Assignee: PANASONIC IP MAN CO LTDPriority: Jun 27, 2012Filed: Mar 1, 2018Published: Jul 5, 2018
Est. expiryJun 27, 2032(~5.9 yrs left)· nominal 20-yr term from priority
H01L 27/1463H01L 27/14636H01L 27/1464H01L 27/14643H01L 27/1461H01L 27/14612H01L 27/14645H01L 27/307H10F 39/8037H10F 39/8033H10F 39/807H10F 39/199H10F 39/182H10F 39/18H10F 39/811H10K 39/32
55
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.

Claims

exact text as granted — not AI-modified
1 . A solid-state imaging device comprising:
 a semiconductor substrate;   a photoelectric converter performing photoelectric conversion of light into charges; and   pixels arranged in matrix, each pixel comprising:
 a charge storage region, in the semiconductor substrate, being electrically connected to the photoelectric converter and storing the charges; 
 an amplification transistor amplifying the charges stored in the charge storage region; 
 a first plug electrically connected to the charge storage region and comprising a first semiconductor material having semiconducting properties; 
 a line including a first part and a second part connected to the first part, the first part having a first surface having a first dent, and 
 a second surface that is opposite to the first surface and that is electrically connected to the first plug, the line comprising a second semiconductor material having semiconducting properties; and 
 a second plug electrically connected to the second part of the line and the photoelectric converter, the second plug comprising a metal having metallic properties, wherein 
   the first plug and a gate electrode of the amplification transistor are electrically connected via the line.   
     
     
         2 . The solid-state imaging device according to  claim 1 , further comprising:
 a third plug electrically connected to the gate electrode of the amplification transistor, wherein   the line further includes a third part connected to the second part, the third part having a third surface having a second dent, and fourth surface that is opposite to the third surface and that is electrically connected to the third plug.   
     
     
         3 . The solid-state imaging device according to  claim 1 , further comprising an element isolation region adjacent to the charge storage region, wherein
 the line covers a first portion of the charge storage region and a second portion of the element isolation region in a plan view of the solid-state imaging device.   
     
     
         4 . The solid-state imaging device according to  claim 1 , wherein a height of a connection surface between the line and the first plug from an upper surface of the semiconductor substrate is less than a height of an upper surface of the gate electrode of the amplification transistor from the upper surface of the semiconductor substrate. 
     
     
         5 . The solid-state imaging device according to  claim 1 , wherein the first semiconductor material and the second semiconductor material include polysilicon. 
     
     
         6 . The solid-state imaging device according to  claim 5 , wherein the polysilicon has an impurity concentration ranging from 1019/cm3 to 1021/cm3. 
     
     
         7 . The solid-state imaging device according to  claim 1 , wherein the first semiconductor material and the second semiconductor material are the same as each other. 
     
     
         8 . The solid-state imaging device according to  claim 1 , wherein each pixel further comprises:
 a reset transistor resetting the charge storage region; and   a sidewall layer that covers a lateral surface of a gate electrode of the reset transistor, wherein   the sidewall layer is disposed without overlapping the first plug in the plan view of the solid-state imaging device.   
     
     
         9 . The solid-state imaging device according to  claim 1 , wherein
 the photoelectric converter comprises a pixel electrode in each of the pixels and a photoelectric conversion film above the pixel electrode, and   the charge storage region is electrically connected to the pixel electrode.   
     
     
         10 . A solid-state imaging device comprising:
 a semiconductor substrate;   a photoelectric converter performing photoelectric conversion of light into charges; and   pixels arranged in matrix, each pixel comprising:
 a charge storage region, in the semiconductor substrate, being electrically connected to the photoelectric converter and storing the charges; 
 an amplification transistor amplifying the charges stored in the charge storage region; 
 a connection layer, comprising a semiconductor material having semiconducting properties, for electrically connecting the charge storage region and a gate electrode of the amplification transistor, the connection layer comprising: 
 a first part and a second part connected to the first part, wherein the first part has a first surface including a first dent, and a second surface opposite to the first surface and having a third part electrically connected to the charge storage region, and the first dent is formed right above the third part; and 
 a plug electrically connected between the second part and the photoelectric converter, the plug comprising a metal having metallic properties. 
   
     
     
         11 . The solid-state imaging device according to  claim 10 , wherein the connection layer further comprises a fourth part connected to the second part, the fourth part having a third surface including a second dent, and fourth surface opposite to the third surface and having a fifth part electrically connected to the gate electrode of the amplification transistor, the second dent being formed right above the fifth part. 
     
     
         12 . The solid-state imaging device according to  claim 10 , further comprising an element isolation region adjacent to the charge storage region, wherein
 the connection layer covers a first portion of the charge storage region and a second portion of the element isolation region in a plan view of the solid-state imaging device.   
     
     
         13 . The solid-state imaging device according to  claim 10 , wherein a height of a connection surface between the second surface and the first plug from an upper surface of the semiconductor substrate is less than a height of an upper surface of the gate electrode of the amplification transistor from the upper surface of the semiconductor substrate. 
     
     
         14 . The solid-state imaging device according to  claim 10 , wherein the semiconductor material includes polysilicon. 
     
     
         15 . The solid-state imaging device according to  claim 14 , wherein the polysilicon has an impurity concentration ranging from 1019/cm3 to 1021/cm3. 
     
     
         16 . The solid-state imaging device according to  claim 10 , wherein each pixel further comprises:
 a reset transistor resetting the charge storage region; and   a sidewall layer that covers a lateral surface of a gate electrode of the reset transistor, wherein   the sidewall layer is disposed without overlapping the first plug in the plan view of the solid-state imaging device.   
     
     
         17 . The solid-state imaging device according to  claim 10 , wherein
 the photoelectric converter comprises a pixel electrode in each of the pixels and a photoelectric conversion film above the pixel electrode, and   the charge storage region is electrically connected to the pixel electrode through the connection layer and the second plug.   
     
     
         18 . The solid-state imaging device according to  claim 10 , wherein the first part, the second part, and the third part are one piece as the connection layer. 
     
     
         19 . The solid-state imaging device according to  claim 11 , wherein the first part, the second part, the third part, the forth part, and the fifth part are one piece as the connection layer.

Join the waitlist — get patent alerts

Track US2018190706A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.